Patents by Inventor Takuya Hoshi

Takuya Hoshi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240413227
    Abstract: A hetero-junction bipolar transistor includes an n-type collector layer made of InGaN, a base layer formed on the collector layer and made of GaN, and an emitter layer formed on the base layer and made of a nitride semiconductor containing Al, in which the collector layer, the base layer, and the emitter layer are formed in a state in which the principal surface is a group V polar plane. The base electrode can be formed in contact with the upper part of the base layer around the emitter layer formed in a mesa shape.
    Type: Application
    Filed: November 16, 2021
    Publication date: December 12, 2024
    Inventors: Takuya Hoshi, Yuta Shiratori, Hiroki Sugiyama, Yuki Yoshiya
  • Patent number: 12142672
    Abstract: An emitter contact layer, an emitter layer, a base layer, a p-type base layer, a collector layer, and a sub-collector layer are crystal-grown over a first substrate in this order with the main surface as the Group III polar surface. The emitter contact layer includes a nitride semiconductor that is made n-type at a relatively high concentration. The emitter layer includes a nitride semiconductor having a bandgap larger than that of the nitride semiconductor constituting the emitter contact layer. The base layer includes an undoped nitride semiconductor having a bandgap smaller than that of the nitride semiconductor constituting the emitter layer. The p-type base layer includes the same nitride semiconductor as the base layer and made p-type.
    Type: Grant
    Filed: May 29, 2019
    Date of Patent: November 12, 2024
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Takuya Hoshi, Yuki Yoshiya, Yuta Shiratori, Hiroki Sugiyama, Minoru Ida, Hideaki Matsuzaki
  • Publication number: 20240266420
    Abstract: This semiconductor device includes a substrate, a buffer layer formed on the substrate, a first semiconductor layer formed on the buffer layer, a second semiconductor layer formed on the first semiconductor layer, and a channel layer and a barrier layer formed on the second semiconductor layer. The substrate includes a nitride semiconductor doped with impurities to have semi-insulating properties or high resistance, the buffer layer includes GaN, the first semiconductor layer includes GaN doped with an acceptor, and the second semiconductor layer includes AlGaN.
    Type: Application
    Filed: June 2, 2021
    Publication date: August 8, 2024
    Inventors: Yuki Yoshiya, Takuya Hoshi, Hiroki Sugiyama, Hideaki Matsuzaki
  • Patent number: 12020931
    Abstract: A first semiconductor layer, a second semiconductor layer, a channel layer, a barrier layer, and a third semiconductor layer are crystal-grown in this order on a first substrate in the +c axis direction, a second substrate is bonded to the side of the barrier layer of the first substrate, and after that, the first substrate is removed, and the first semiconductor layer is selectively thermally decomposed by heating.
    Type: Grant
    Filed: January 8, 2020
    Date of Patent: June 25, 2024
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Yuki Yoshiya, Takuya Hoshi, Hiroki Sugiyama, Hideaki Matsuzaki
  • Patent number: 11915978
    Abstract: A first regrowth layer and a second regrowth layer comprising GaAs having high resistance are regrown on a surface of an etching stop layer exposed to the bottom of a first groove and a second groove, and then n-type InGaAs is regrown on the first regrowth layer and the second regrowth layer, whereby a source region and a drain region configured to make contact with a channel layer are formed in the first groove and the second groove respectively.
    Type: Grant
    Filed: November 15, 2019
    Date of Patent: February 27, 2024
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Takuya Hoshi, Yuki Yoshiya, Hiroki Sugiyama, Hideaki Matsuzaki
  • Publication number: 20230360911
    Abstract: After a nitride semiconductor layer is formed through crystal-growth of a nitride semiconductor containing Ga in a +c-axis direction on the other substrate, the other substrate on which the nitride semiconductor layer is formed is bonded to a substrate in a state where a surface on which the nitride semiconductor layer of the other substrate is formed is on the side of the substrate (a bonding step). This bonding is performed by bonding the surfaces to be bonded by a known direct bonding technology.
    Type: Application
    Filed: November 4, 2020
    Publication date: November 9, 2023
    Inventors: Yuki Yoshiya, Takuya Hoshi, Hiroki Sugiyama, Hideaki Matsuzaki
  • Patent number: 11798995
    Abstract: A first collector layer is composed of n-type InP (n-InP) doped with Si at a low concentration. A second collector layer is composed of non-doped InGaAs. A base layer is composed of p-type GaAsSb (p+-GaAsSb) doped with C at a high concentration. An emitter layer is composed of a compound semiconductor different from that of the base layer, and has an area smaller than the base layer in a plan view. An emitter layer can be composed of, for example, n-type InP (n-InP) doped with Si at a low concentration.
    Type: Grant
    Filed: June 4, 2019
    Date of Patent: October 24, 2023
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Yuta Shiratori, Takuya Hoshi, Minoru Ida
  • Publication number: 20230207661
    Abstract: An oxide layer (109) including an oxide of an electrode (108) material is formed by heating in a portion of an electrode (108) in contact with a surface oxidized layer (107). The oxide layer (109) is placed between the electrode (108) and an i-AlGaN layer (106) in contact with both the i-AlGaN layer (106) and the electrode (108).
    Type: Application
    Filed: April 23, 2020
    Publication date: June 29, 2023
    Inventors: Takuya Hoshi, Yuki Yoshiya, Yuta Shiratori, Hiroki Sugiyama
  • Patent number: 11430875
    Abstract: A first barrier layer, a channel layer, a second barrier layer, and a first bonding layer made of high-resistance AlGaN doped with Fe are formed on a first substrate. Thereafter, the first substrate and the second substrate are pasted in a state where the first bonding layer and a second bonding layer made of high-resistance GaN doped with Fe are opposed to each other.
    Type: Grant
    Filed: March 27, 2019
    Date of Patent: August 30, 2022
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Takuya Hoshi, Yuki Yoshiya, Hiroki Sugiyama, Hideaki Matsuzaki
  • Publication number: 20220231130
    Abstract: A first collector layer is composed of n-type InP (n-InP) doped with Si at a low concentration. A second collector layer is composed of non-doped InGaAs. A base layer is composed of p-type GaAsSb (p+-GaAsSb) doped with C at a high concentration. An emitter layer is composed of a compound semiconductor different from that of the base layer, and has an area smaller than the base layer in a plan view. An emitter layer can be composed of, for example, n-type InP (n-InP) doped with Si at a low concentration.
    Type: Application
    Filed: June 4, 2019
    Publication date: July 21, 2022
    Inventors: Yuta Shiratori, Takuya Hoshi, Minoru Ida
  • Publication number: 20220208998
    Abstract: An emitter contact layer, an emitter layer, a base layer, a p-type base layer, a collector layer, and a sub-collector layer are crystal-grown over a first substrate in this order with the main surface as the Group III polar surface. The emitter contact layer includes a nitride semiconductor that is made n-type at a relatively high concentration. The emitter layer includes a nitride semiconductor having a bandgap larger than that of the nitride semiconductor constituting the emitter contact layer. The base layer includes an undoped nitride semiconductor having a bandgap smaller than that of the nitride semiconductor constituting the emitter layer. The p-type base layer includes the same nitride semiconductor as the base layer and made p-type.
    Type: Application
    Filed: May 29, 2019
    Publication date: June 30, 2022
    Inventors: Takuya Hoshi, Yuki Yoshiya, Yuta Shiratori, Hiroki Sugiyama, Minoru Ida, Hideaki Matsuzaki
  • Publication number: 20220051889
    Abstract: A first semiconductor layer, a second semiconductor layer, a channel layer, a barrier layer, and a third semiconductor layer are crystal-grown in this order on a first substrate in the +c axis direction, a second substrate is bonded to the side of the barrier layer of the first substrate, and after that, the first substrate is removed, and the first semiconductor layer is selectively thermally decomposed by heating.
    Type: Application
    Filed: January 8, 2020
    Publication date: February 17, 2022
    Inventors: Yuki Yoshiya, Takuya Hoshi, Hiroki Sugiyama, Hideaki Matsuzaki
  • Publication number: 20210398857
    Abstract: A first regrowth layer and a second regrowth layer comprising GaAs having high resistance are regrown on a surface of an etching stop layer exposed to the bottom of a first groove and a second groove, and then n-type InGaAs is regrown on the first regrowth layer and the second regrowth layer, whereby a source region and a drain region configured to make contact with a channel layer are formed in the first groove and the second groove respectively.
    Type: Application
    Filed: November 15, 2019
    Publication date: December 23, 2021
    Applicant: Nippon Telegraph and Telephone Corporation
    Inventors: Takuya Hoshi, Yuki Yoshiya, Hiroki Sugiyama, Hideaki Matsuzaki
  • Publication number: 20210020760
    Abstract: A first barrier layer, a channel layer, a second barrier layer, and a first bonding layer made of high-resistance AlGaN doped with Fe are formed on a first substrate. Thereafter, the first substrate and the second substrate are pasted in a state where the first bonding layer and a second bonding layer made of high-resistance GaN doped with Fe are opposed to each other.
    Type: Application
    Filed: March 27, 2019
    Publication date: January 21, 2021
    Inventors: Takuya Hoshi, Yuki Yoshiya, Hiroki Sugiyama, Hideaki Matsuzaki
  • Patent number: 10280659
    Abstract: A door-equipped vehicle body structure (10) includes a door opening (35) provided to a vehicle (11), a door (40) for opening and closing the door opening (35), and a grip (45) provided to the door (40). The door (40) is provided with a general surface (62) and an upper surface (63). The general surface (62) is a surface extending along a door surface (61). The upper surface (63) is a surface extending from an upper end (62a) of the general surface (62) toward an outside (22) of the vehicle. The grip (45) is provided so as to project upward from the upper surface (63).
    Type: Grant
    Filed: October 1, 2015
    Date of Patent: May 7, 2019
    Assignee: Honda Motor Co., Ltd.
    Inventors: Tomoki Yamaguchi, Seiji Honda, Yusuke Fujita, Shigeki Tanimoto, Takuya Hoshi
  • Publication number: 20170234041
    Abstract: A door-equipped vehicle body structure (10) includes a door opening (35) provided to a vehicle (11), a door (40) for opening and closing the door opening (35), and a grip (45) provided to the door (40). The door (40) is provided with a general surface (62) and an upper surface (63). The general surface (62) is a surface extending along a door surface (61). The upper surface (63) is a surface extending from an upper end (62a) of the general surface (62) toward an outside (22) of the vehicle. The grip (45) is provided so as to project upward from the upper surface (63).
    Type: Application
    Filed: October 1, 2015
    Publication date: August 17, 2017
    Inventors: Tomoki Yamaguchi, Seiji Honda, Yusuke Fujita, Shigeki Tanimoto, Takuya Hoshi
  • Patent number: 9669688
    Abstract: A tailgate-equipped vehicle body structure includes a tailgate for opening and closing a rear opening section provided in a rear section of a vehicle, and a sub door provided on the tailgate for opening and closing a sub door opening section provided in the tailgate. The upper surface of a lower edge portion of the rear opening section and the upper surface of a lower edge portion of the sub door opening section are located in substantially flush with each other.
    Type: Grant
    Filed: October 22, 2015
    Date of Patent: June 6, 2017
    Assignee: HONDA MOTOR CO., LTD.
    Inventors: Tomoki Yamaguchi, Seiji Honda, Yusuke Fujita, Takuya Hoshi
  • Publication number: 20160114662
    Abstract: A tailgate-equipped vehicle body structure includes a tailgate for opening and closing a rear opening section provided in a rear section of a vehicle, and a sub door provided on the tailgate for opening and closing a sub door opening section provided in the tailgate. The upper surface of a lower edge portion of the rear opening section and the upper surface of a lower edge portion of the sub door opening section are located in substantially flush with each other.
    Type: Application
    Filed: October 22, 2015
    Publication date: April 28, 2016
    Applicant: HONDA MOTOR CO., LTD.
    Inventors: Tomoki Yamaguchi, Seiji Honda, Yusuke Fujita, Takuya Hoshi