Patents by Inventor Takuya HOSHII

Takuya HOSHII has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Charge trap evaluation method and semiconductor element
    Patent number: 11652150
    Abstract: Provided are a charge trap evaluation method and semiconductor device including, in an embodiment, a step for applying an initialization voltage that has the same sign as a threshold voltage and is greater than or equal to the threshold voltage between the source electrode 15 and drain electrode 16 of a semiconductor device 1 having an HEMT structure and the substrate 10 of the semiconductor device 1 and initializing a trap state by forcing out trapped charge from a trap level and a step for monitoring the current flowing between the source electrode 15 and drain electrode 16 after the trap state initialization and evaluating at least one from among charge trapping, current collapse, and charge release.
    Type: Grant
    Filed: August 6, 2018
    Date of Patent: May 16, 2023
    Assignee: SUMITOMO CHEMICAL COMPANY, LIMITED
    Inventors: Kuniyuki Kakushima, Takuya Hoshii, Hitoshi Wakabayashi, Kazuo Tsutsui, Hiroshi Iwai, Taiki Yamamoto
  • Method for evaluating electrical defect density of semiconductor layer, and semiconductor element
    Patent number: 11513149
    Abstract: One embodiment of the present invention provides a method for evaluating the electrical defect density of a semiconductor layer, which comprises: a step for measuring an electric current by applying a voltage to a semiconductor element 1 which comprises a GaN layer 12 that serves as a semiconductor layer; and a step for deriving the electrical defect density in the GaN layer 12 with use of the measured electric current value.
    Type: Grant
    Filed: August 6, 2018
    Date of Patent: November 29, 2022
    Assignee: SUMITOMO CHEMICAL COMPANY, LIMITED
    Inventors: Kuniyuki Kakushima, Takuya Hoshii, Hitoshi Wakabayashi, Kazuo Tsutsui, Hiroshi Iwai, Taiki Yamamoto
  • METHOD FOR EVALUATING ELECTRICAL DEFECT DENSITY OF SEMICONDUCTOR LAYER, AND SEMICONDUCTOR ELEMENT
    Publication number: 20200225276
    Abstract: One embodiment of the present invention provides a method for evaluating the electrical defect density of a semiconductor layer, which comprises: a step for measuring an electric current by applying a voltage to a semiconductor element 1 which comprises a GaN layer 12 that serves as a semiconductor layer; and a step for deriving the electrical defect density in the GaN layer 12 with use of the measured electric current value.
    Type: Application
    Filed: August 6, 2018
    Publication date: July 16, 2020
    Applicant: SUMITOMO CHEMICAL COMPANY, LIMITED
    Inventors: Kuniyuki KAKUSHIMA, Takuya HOSHII, Hitoshi WAKABAYASHI, Kazuo TSUTSUI, Hiroshi IWAI, Taiki YAMAMOTO
  • CHARGE TRAP EVALUATION METHOD AND SEMICONDUCTOR ELEMENT
    Publication number: 20200203493
    Abstract: Provided are a charge trap evaluation method and semiconductor device including, in an embodiment, a step for applying an initialization voltage that has the same sign as a threshold voltage and is greater than or equal to the threshold voltage between the source electrode 15 and drain electrode 16 of a semiconductor device 1 having an HEMT structure and the substrate 10 of the semiconductor device 1 and initializing a trap state by forcing out trapped charge from a trap level and a step for monitoring the current flowing between the source electrode 15 and drain electrode 16 after the trap state initialization and evaluating at least one from among charge trapping, current collapse, and charge release.
    Type: Application
    Filed: August 6, 2018
    Publication date: June 25, 2020
    Applicant: SUMITOMO CHEMICAL COMPANY, LIMITED
    Inventors: Kuniyuki KAKUSHIMA, Takuya HOSHII, Hitoshi WAKABAYASHI, Kazuo TSUTSUI, Hiroshi IWAI, Taiki YAMAMOTO