Abstract: A semiconductor light emitting device which can suppress the self-absorption of light propagating in a semiconductor film without hindering current spread therein. A reflecting film provided between a support substrate and the semiconductor film of the device includes reflecting electrodes that are in ohmic contact with the semiconductor film and that form current paths between the reflecting electrodes and surface electrodes in the semiconductor film. The reflecting electrodes are in contact with the semiconductor film at such positions that the surface electrodes, provided on the light-extraction-surface-side surface of the semiconductor film, are not over the reflecting electrodes along a direction of the thickness of the semiconductor film.

Abstract: The device includes a support substrate, a reflective electrode on the support substrate; an AlGaInP-based semiconductor film including a light-emission layer and is provided on the reflective electrode, and a surface electrode provided on the semiconductor film. The surface electrode includes an ohmic electrode constituted by electrode pieces disposed on the semiconductor film in a distributed manner; the reflective electrode is constituted by a line electrode and dot electrodes provided on both sides of each of the electrode pieces, along the electrode pieces; the surface electrode and the reflective electrode are disposed so as to satisfy the following equations: b>a, and 0.8(a2+2ab)1/2<c<2.4(a2+2ab)1/2.

Abstract: In an optical semiconductor device including an epitaxially-grown light emitting semiconductor layer and a reflective electrode layer provided at a counter face of the light emitting semiconductor layer opposing a light extracting face thereof, a support electrode layer is provided between the reflective electrode layer and the counter face of the light emitting semiconductor layer and is adapted to support the light emitting semiconductor layer and electrically connect the light emitting semiconductor layer to the reflective electrode layer. Also, a total area of the support electrode layer is smaller than an area of the reflective electrode layer. Further, an air gap at a periphery of the support electrode layer and the reflective electrode layer serves as a reflective mirror.

Abstract: There is provided a method of manufacturing a semiconductor device. The method includes the successive steps of: (a) providing a semiconductor substrate; (b) forming a plurality of semiconductor chips having electrode pads on the semiconductor substrate; (c) forming internal connection terminals on the electrode pads; (d) forming an insulating layer on the plurality of semiconductor chips to cover the internal connection terminals; (e) forming a metal layer on the insulating layer; (f) pushing a whole area of the metal layer to bring the metal layer into contact with upper end portions of the internal connection terminals; (g) pushing portions of the metal layer which contact the upper end portions of the internal connection terminals, thereby forming first recesses in the internal connection terminals, and thereby forming second recesses in the metal layer; and (h) forming wiring patterns by etching the metal layer.

Abstract: A light emitting device with an increased light extraction efficiency includes a two-dimensional periodic structure in a surface thereof and has two layers that together form an asymmetric refractive index distribution with respect to the active layer, which is in between the two layers. The light emitting device includes a substrate layer, a first layer, an active layer and a second layer that are stacked sequentially. The first layer includes at least one layer, including a semiconductor cladding layer of a first conductivity type. At least one layer of the first layer has a refractive index that is lower than a refractive index of the active layer and lower than a refractive index of a layer of the second layer that is adjacent to the active layer. Each constituent layer of the second layer has a refractive index that is lower than the refractive index of the active layer.

Abstract: There is provided a method of manufacturing a semiconductor device. The method includes the successive steps of: (a) providing a semiconductor substrate; (b) forming a plurality of semiconductor chips having electrode pads on the semiconductor substrate; (c) forming internal connection terminals on the electrode pads; (d) forming an insulating layer on the plurality of semiconductor chips to cover the internal connection terminals; (e) forming a metal layer on the insulating layer; (f) pushing a whole area of the metal layer to bring the metal layer into contact with upper end portions of the internal connection terminals; (g) pushing portions of the metal layer which contact the upper end portions of the internal connection terminals, thereby forming first recesses in the internal connection terminals, and thereby forming second recesses in the metal layer; and (h) forming wiring patterns by etching the metal layer.

Abstract: A semiconductor substrate has a plurality of semiconductor chip forming areas and scribe areas including substrate cutting positions arranged between the plurality of semiconductor chip forming areas. An insulating layer having first opening portions, which expose all or a part of the scribe areas respectively, is formed on the semiconductor substrate. A solder resist layer having second opening portions, which expose all or a part of the scribe areas respectively, is formed on the insulating layer. Portions of the semiconductor substrate corresponding to the substrate cutting positions are cut.

Abstract: There is provided a method of manufacturing a semiconductor device. The method includes the successive steps of: (a) providing a semiconductor substrate; (b) forming a plurality of semiconductor chips having electrode pads on the semiconductor substrate; (c) forming internal connection terminals on the electrode pads; (d) forming an insulating layer on the plurality of semiconductor chips to cover the internal connection terminals; (e) forming a metal layer on the insulating layer; (f) pushing a whole area of the metal layer to bring the metal layer into contact with upper end portions of the internal connection terminals; (g) pushing portions of the metal layer which contact the upper end portions of the internal connection terminals, thereby forming first recesses in the internal connection terminals, and thereby forming second recesses in the metal layer; and (h) forming wiring patterns by etching the metal layer.

Abstract: A light emitting device with an increased light extraction efficiency includes a two-dimensional periodic structure in a surface thereof and has two layers that together form an asymmetric refractive index distribution with respect to the active layer, which is in between the two layers. The light emitting device includes a substrate layer, a first layer, an active layer and a second layer that are stacked sequentially. The first layer includes at least one layer, including a semiconductor cladding layer of a first conductivity type. At least one layer of the first layer has a refractive index that is lower than a refractive index of the active layer and lower than a refractive index of a layer of the second layer that is adjacent to the active layer. Each constituent layer of the second layer has a refractive index that is lower than the refractive index of the active layer.

Abstract: A semiconductor component having electrode terminals 14 formed in rectangular planar shapes arranged in parallel on an electrode forming surface of a semiconductor chip and formed with rerouting patterns 16 electrically connected with the electrode terminals 14 through vias on the surface of an electrical insulating layer covering the electrode forming surface, characterized in that the planar arrangement of the via pads 20 formed on the surface of the electrical insulating layer is made an arrangement alternately offset to one side and the other side of the longitudinal direction of the electrode terminals 14 and in that rerouting patterns 16 are provided connected to the via pads 20. The present invention enables easy formation of rerouting patterns even when the electrode terminals are arranged at fine intervals.

Abstract: A semiconductor component having electrode terminals 14 formed in rectangular planar shapes arranged in parallel on an electrode forming surface of a semiconductor chip and formed with rerouting patterns 16 electrically connected with the electrode terminals 14 through vias on the surface of an electrical insulating layer covering the electrode forming surface, characterized in that the planar arrangement of the via pads 20 formed on the surface of the electrical insulating layer is made an arrangement alternately offset to one side and the other side of the longitudinal direction of the electrode terminals 14 and in that rerouting patterns 16 are provided connected to the via pads 20. The present invention enables easy formation of rerouting patterns even when the electrode terminals are arranged at fine intervals.

Abstract: A unit interconnection substrate for mounting leadless type electronic parts on a mount substrate by superposing them on each other in two or more stages, comprising an insulating surface on the top surface of which an interconnection circuit with conductor pads and connection terminals is formed, depressions for holding electronic parts formed in a bottom surface of the insulating substrate, connection terminals provided on the bottom surface of the insulating substrate on the periphery of the depression, and connection terminals electrically connected to the connection terminals of the top surface of the insulating substrate via conductor via holes provided in the insulating substrate. Electronic parts are electrically connected to the conductor pads on the top surface of the insulating substrate, thereby to make it possible to mount the electronic parts on the insulating substrate.

Abstract: In a semiconductor device manufacturing method for forming a rerouting layer, which has wirings for leading electrically electrode terminals and bonding pads, on a major surface side on which the electrode terminals of a semiconductor element are provided, the wirings are formed thinner than the bonding pads.

Abstract: A substrate for inspecting an electronic device used for an electrical test of the electronic device having bump-shaped connection terminals, comprises: opening sections, the diameter of each opening being determined so that a connection terminal can be inserted into and drawn out from the opening, are formed penetrating the insulating substrate in a region on one side of an insulating substrate on which the electronic device is mounted, corresponding to an arrangement of the connection terminals; and wiring patterns, each of which is composed of a pad section being exposed onto a bottom face of the opening so that the pad can come into contact with the connection terminal so as to accomplish electrical continuity, a connecting pad section formed in a region outside of the region in which the pad section is formed, which comes into contact with a contact terminal of an inspection device so as to accomplish electrical continuity, and a wiring section for electrically connecting the pad section with the connect

Abstract: A unit interconnection substrate for mounting leadless type electronic parts on a mount substrate by superposing them on each other in two or more stages, comprising an insulating surface on the top surface of which an interconnection circuit with conductor pads and connection terminals is formed, depressions for holding electronic parts formed in a bottom surface of the insulating substrate, connection terminals provided on the bottom surface of the insulating substrate on the periphery of the depression, and connection terminals electrically connected to the connection terminals of the top surface of the insulating substrate via conductor via holes provided in the insulating substrate. Electronic parts are electrically connected to the conductor pads on the top surface of the insulating substrate, thereby to make it possible to mount the electronic parts on the insulating substrate.

Abstract: A semiconductor device having a semiconductor element and a connecting substrate, wherein the connecting substrate includes a flat sheet-like insulation member, having first and second surfaces. The first surface is provided with solder bumps projecting at locations corresponding to locations of electrodes on an electrode/terminal-formed face of the semiconductor element, or terminals formed at ends of patterned wirings formed by rerouting a conductive material on the electrode/terminal-formed fact. The second surface is provided with external connection terminals having a larger diameter than the solder bumps on the first surface and being electrically connected with the solder bumps through a via piercing the insulation member in the direction of its thickness. The semiconductor element is mounted on the connecting substrate by bonding the electrodes or the terminals on the electrode/terminal-formed face of the semiconductor element to the solder bumps.