Patents by Inventor Takuya Kimoto

Takuya Kimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11594519
    Abstract: A semiconductor device includes a plurality of semiconductor chips disposed in a vertical form through a spacer, in which a shield layer having a thickness such that an electromagnetic field radiation generated from a generation source of the semiconductor chip can sufficiently be absorbed is disposed between the semiconductor chips.
    Type: Grant
    Filed: October 5, 2018
    Date of Patent: February 28, 2023
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Naruhiro Yoshida, Takuya Kimoto, Seiichiro Fukai
  • Publication number: 20210041608
    Abstract: Provided is a dielectric multilayer film mirror including: a substrate; a first multilayer film structure formed on the substrate and including alternately stacked layers of a first low refractive index material having a refractive index equal to or lower than a refractive index of a second low refractive index material and a first high refractive index material having a refractive index higher than a refractive index of a second high refractive index material; and a second multilayer film structure formed on the first multilayer film structure and including alternately stacked layers of the second low refractive index material and the second high refractive index material, the second high refractive index material having a refractive index higher than a refractive index of the second low refractive index material and having an extinction coefficient lower than an extinction coefficient of the first high refractive index material.
    Type: Application
    Filed: February 27, 2018
    Publication date: February 11, 2021
    Applicant: Shimadzu Corporation
    Inventors: Takuya KIMOTO, Yasuyuki FURUKAWA
  • Publication number: 20200388593
    Abstract: A semiconductor device includes a plurality of semiconductor chips disposed in a vertical form through a spacer, in which a shield layer having a thickness such that an electromagnetic field radiation generated from a generation source of the semiconductor chip can sufficiently be absorbed is disposed between the semiconductor chips.
    Type: Application
    Filed: October 5, 2018
    Publication date: December 10, 2020
    Inventors: NARUHIRO YOSHIDA, TAKUYA KIMOTO, SEIICHIRO FUKAI
  • Patent number: 8878709
    Abstract: Disclosed herein is a semiconductor integrated circuit including: line buffers; an alpha channel first selector; an alpha channel digital-to-analog converter; a beta channel digital-to-analog converter; a redundant digital-to-analog converter; an alpha channel second selector; a beta channel second selector; an alpha channel amplifier; and a beta channel amplifier.
    Type: Grant
    Filed: June 16, 2010
    Date of Patent: November 4, 2014
    Assignee: Sony Corporation
    Inventors: Kenji Hyodo, Takashi Ichirizuka, Takuya Kimoto, Minoru Togo
  • Publication number: 20110001765
    Abstract: Disclosed herein is a semiconductor integrated circuit including: line buffers; an alpha channel first selector; an alpha channel digital-to-analog converter; a beta channel digital-to-analog converter; a redundant digital-to-analog converter; an alpha channel second selector; a beta channel second selector; an alpha channel amplifier; and a beta channel amplifier.
    Type: Application
    Filed: June 16, 2010
    Publication date: January 6, 2011
    Applicant: Sony Corporation
    Inventors: Kenji Hyodo, Takashi Ichirizuka, Takuya Kimoto, Minoru Togo
  • Publication number: 20100182299
    Abstract: A semiconductor integrated circuit is disclosed which includes: a first D/A converter; a second D/A converter; an amplifier configured to amplify an output of the first D/A converter; an operational amplifier configured to input an output of the second D/A converter; and a selector configured to effect switchover between a normal mode and a test mode, the normal mode being a mode in which the operational amplifier is caused to function as an amplifier for amplifying the output of the second D/A converter, the test mode being a mode in which the operational amplifier is caused to function as a comparator for comparing the output of the second D/A converter with the output of the first D/A converter.
    Type: Application
    Filed: December 3, 2009
    Publication date: July 22, 2010
    Applicant: Sony Corporation
    Inventors: Kenji Hyoudou, Takashi Ichirizuka, Takuya Kimoto, Minoru Togo