Patents by Inventor Takuya KITABAYASHI

Takuya KITABAYASHI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11784156
    Abstract: A semiconductor device includes: an insulating substrate; a first semiconductor element connected to the insulating substrate; a conductive member disposed on the insulating substrate, and including a first opposing portion and a second opposing portion located opposite each other with respect to the first semiconductor element in plan view; a first wire connected to the first semiconductor element and the first opposing portion; and a second wire connected to the first semiconductor element and the second opposing portion, and located opposite the first wire with respect to a connection point where the first wire and the first semiconductor element are connected to each other in plan view.
    Type: Grant
    Filed: July 12, 2021
    Date of Patent: October 10, 2023
    Assignee: Mitsubishi Electric Corporation
    Inventors: Takuya Kitabayashi, Hiroyuki Masumoto
  • Patent number: 11329012
    Abstract: A technique for activating a fuse function in a semiconductor device in a relatively short time is provided. The semiconductor device includes a second bonding material provided on the upper surface of the insulating substrate, a third bonding material provided on an upper surface of the semiconductor element, a through hole extending from the first circuit pattern to the second circuit pattern via the core material, a conductive film provided on an inner wall of the through hole, and a heat insulating material provided inside the through hole and surrounded by the conductive film in plan view. The conductive film allows the first circuit pattern and the second circuit pattern to be conductive.
    Type: Grant
    Filed: October 16, 2019
    Date of Patent: May 10, 2022
    Assignee: Mitsubishi Electric Corporation
    Inventors: Takuya Kitabayashi, Hiroshi Yoshida, Hidetoshi Ishibashi, Daisuke Murata
  • Publication number: 20220102312
    Abstract: A semiconductor device includes: an insulating substrate; a first semiconductor element connected to the insulating substrate; a conductive member disposed on the insulating substrate, and including a first opposing portion and a second opposing portion located opposite each other with respect to the first semiconductor element in plan view; a first wire connected to the first semiconductor element and the first opposing portion; and a second wire connected to the first semiconductor element and the second opposing portion, and located opposite the first wire with respect to a connection point where the first wire and the first semiconductor element are connected to each other in plan view.
    Type: Application
    Filed: July 12, 2021
    Publication date: March 31, 2022
    Applicant: Mitsubishi Electric Corporation
    Inventors: Takuya KITABAYASHI, Hiroyuki MASUMOTO
  • Patent number: 11291107
    Abstract: An object is to suppress the temperature rise of a semiconductor element due to the heat generation of a metal wire. A semiconductor device includes a printed circuit board including a first circuit pattern and a second circuit pattern, and a semiconductor element arranged on an upper surface of the first circuit pattern, in which, in the semiconductor element, a drain electrode is arranged on an upper surface thereof and a gate electrode and a source electrode are arranged on a lower surface thereof, the gate electrode and the source electrode are bonded to the upper surface of the first circuit pattern via a first bonding material, and the drain electrode is bonded to an upper surface of the second circuit pattern via a metal member connected to the upper surface of the semiconductor element.
    Type: Grant
    Filed: February 11, 2021
    Date of Patent: March 29, 2022
    Assignee: Mitsubishi Electric Corporation
    Inventor: Takuya Kitabayashi
  • Publication number: 20210360771
    Abstract: An object is to suppress the temperature rise of a semiconductor element due to the heat generation of a metal wire. A semiconductor device includes a printed circuit board including a first circuit pattern and a second circuit pattern, and a semiconductor element arranged on an upper surface of the first circuit pattern, in which, in the semiconductor element, a drain electrode is arranged on an upper surface thereof and a gate electrode and a source electrode are arranged on a lower surface thereof, the gate electrode and the source electrode are bonded to the upper surface of the first circuit pattern via a first bonding material, and the drain electrode is bonded to an upper surface of the second circuit pattern via a metal member connected to the upper surface of the semiconductor element.
    Type: Application
    Filed: February 11, 2021
    Publication date: November 18, 2021
    Applicant: Mitsubishi Electric Corporation
    Inventor: Takuya KITABAYASHI
  • Patent number: 10790218
    Abstract: A semiconductor device according to the present invention includes a relay substrate provided on a plurality of semiconductor chips. The relay substrate includes an insulating plate in which a through hole is formed, a lower conductor provided on a lower surface of the insulating plate and having a first lower conductor and a second lower conductor, an upper conductor provided on an upper surface of the insulating plate, a connection part provided in the through hole and connecting the second lower conductor and the upper conductor together, and a protruding part which is a part of one of the first lower conductor and the upper conductor and protrudes outward from the insulating plate, the protruding part is connected to a first external electrode, and another of the first lower conductor and the upper conductor is connected to a second external electrode and is positioned inside the insulating plate.
    Type: Grant
    Filed: May 7, 2019
    Date of Patent: September 29, 2020
    Assignee: Mitsubishi Electric Corpration
    Inventors: Hidetoshi Ishibashi, Hiroshi Yoshida, Daisuke Murata, Takuya Kitabayashi
  • Patent number: 10770367
    Abstract: A semiconductor apparatus includes: a substrate including a circuit pattern on an upper surface side and a metal plate on a lower surface side; a semiconductor device joined to the circuit pattern via a conductive component; a case located to surround the substrate; a sealing material sealing the semiconductor device and the substrate in a section surrounded by the case; and a bonding agent bonding the case and the metal plate on a side face of the substrate.
    Type: Grant
    Filed: October 15, 2018
    Date of Patent: September 8, 2020
    Assignee: Mitsubishi Electric Corporation
    Inventors: Takuya Kitabayashi, Hiroshi Yoshida, Hidetoshi Ishibashi, Daisuke Murata
  • Publication number: 20200235060
    Abstract: A technique for activating a fuse function in a semiconductor device in a relatively short time is provided. The semiconductor device includes a second bonding material provided on the upper surface of the insulating substrate, a third bonding material provided on an upper surface of the semiconductor element, a through hole extending from the first circuit pattern to the second circuit pattern via the core material, a conductive film provided on an inner wall of the through hole, and a heat insulating material provided inside the through hole and surrounded by the conductive film in plan view. The conductive film allows the first circuit pattern and the second circuit pattern to be conductive.
    Type: Application
    Filed: October 16, 2019
    Publication date: July 23, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventors: Takuya KITABAYASHI, Hiroshi YOSHIDA, Hidetoshi ISHIBASHI, Daisuke MURATA
  • Publication number: 20200083146
    Abstract: A semiconductor device according to the present invention includes a relay substrate provided on a plurality of semiconductor chips. The relay substrate includes an insulating plate in which a through hole is formed, a lower conductor provided on a lower surface of the insulating plate and having a first lower conductor and a second lower conductor, an upper conductor provided on an upper surface of the insulating plate, a connection part provided in the through hole and connecting the second lower conductor and the upper conductor together, and a protruding part which is a part of one of the first lower conductor and the upper conductor and protrudes outward from the insulating plate, the protruding part is connected to a first external electrode, and another of the first lower conductor and the upper conductor is connected to a second external electrode and is positioned inside the insulating plate.
    Type: Application
    Filed: May 7, 2019
    Publication date: March 12, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventors: Hidetoshi ISHIBASHI, Hiroshi YOSHIDA, Daisuke MURATA, Takuya KITABAYASHI
  • Publication number: 20190304866
    Abstract: A semiconductor apparatus includes: an insulating substrate including a circuit pattern on an upper surface side and a metal plate on a lower surface side; a semiconductor device joined to the circuit pattern via a conductive component; a case located to surround the insulating substrate; a sealing material sealing the semiconductor device and the insulating substrate in a section surrounded by the case; and a bonding agent bonding the case and the metal plate on a side face of the insulating substrate.
    Type: Application
    Filed: October 15, 2018
    Publication date: October 3, 2019
    Applicant: Mitsubishi Electric Corporation
    Inventors: Takuya KITABAYASHI, Hiroshi YOSHIDA, Hidetoshi ISHIBASHI, Daisuke MURATA