Patents by Inventor Takuya LEE

Takuya LEE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10664370
    Abstract: Related semiconductor devices have a problem in which analysis processing with high defect reproducibility cannot be performed. According to an embodiment, a semiconductor device includes a first arithmetic core that executes a first program stored in a first code area using a first local memory area and a second arithmetic core that executes a second program stored in a second code area using a second local memory area. In an analysis mode, the semiconductor device performs first analysis processing that causes both the first arithmetic core and the second arithmetic core to execute the first program and second analysis processing that causes both the first arithmetic core and the second arithmetic core to execute the second program, and compares a plurality of arithmetic result data pieces acquired from the first and second analysis processing to thereby acquire analysis information used for defect analysis.
    Type: Grant
    Filed: May 2, 2018
    Date of Patent: May 26, 2020
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Kenji Shiozawa, Yoshihide Nakamura, Takuya Lee, Yutaka Nakadai, Tetsuya Kokubun, Hiroyuki Sasaki
  • Patent number: 10656201
    Abstract: According to one embodiment, a semiconductor device performs processing based on a user program by using a user program, which is used in a normal mode, as an analysis program and making a plurality of peripheral circuits having the same function operate in lock-step where the plurality of peripheral circuits operate in the identical manner, and makes failure diagnosis of the peripheral circuits by determining match or mismatch of a plurality of analysis information respectively obtained from the plurality of peripheral circuits operating in lock-step.
    Type: Grant
    Filed: May 3, 2018
    Date of Patent: May 19, 2020
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Takuya Lee, Tetsuya Kokubun, Yutaka Nakadai, Kenji Shiozawa, Yoshihide Nakamura
  • Publication number: 20190004110
    Abstract: According to one embodiment, a semiconductor device performs processing based on a user program by using a user program, which is used in a normal mode, as an analysis program and making a plurality of peripheral circuits having the same function operate in lock-step where the plurality of peripheral circuits operate in the identical manner, and makes failure diagnosis of the peripheral circuits by determining match or mismatch of a plurality of analysis information respectively obtained from the plurality of peripheral circuits operating in lock-step.
    Type: Application
    Filed: May 3, 2018
    Publication date: January 3, 2019
    Inventors: Takuya LEE, Tetsuya KOKUBUN, Yutaka NAKADAI, Kenji SHIOZAWA, Yoshihide NAKAMURA
  • Publication number: 20190004914
    Abstract: Related semiconductor devices have a problem in which analysis processing with high defect reproducibility cannot be performed. According to an embodiment, a semiconductor device includes a first arithmetic core that executes a first program stored in a first code area using a first local memory area and a second arithmetic core that executes a second program stored in a second code area using a second local memory area. In an analysis mode, the semiconductor device performs first analysis processing that causes both the first arithmetic core and the second arithmetic core to execute the first program and second analysis processing that causes both the first arithmetic core and the second arithmetic core to execute the second program, and compares a plurality of arithmetic result data pieces acquired from the first and second analysis processing to thereby acquire analysis information used for defect analysis.
    Type: Application
    Filed: May 2, 2018
    Publication date: January 3, 2019
    Inventors: Kenji SHIOZAWA, Yoshihide NAKAMURA, Takuya LEE, Yutaka NAKADAI, Tetsuya KOKUBUN, Hiroyuki SASAKI
  • Publication number: 20180364297
    Abstract: A semiconductor device includes a bus, first and second bus drivers that drive the bus, and a control circuit that controls the first and second bus drivers. The control circuit controls the first and second bus drivers in such a way that the first and second bus drivers supply logic signals different from each other to the bus.
    Type: Application
    Filed: June 12, 2018
    Publication date: December 20, 2018
    Applicant: Renesas Electronics Corporation
    Inventors: Yoshihide NAKAMURA, Kenji SHIOZAWA, Tetsuya KOKUBUN, Yutaka NAKADAI, Takuya LEE