Patents by Inventor Takuya Makise

Takuya Makise has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9276462
    Abstract: Provided is a controller that is capable of reducing fall in a waveform of a power supply voltage when the power supply voltage supplied to a CPU is reduced. A controller for controlling voltage regulators includes a differential amplifier that outputs a measurement voltage corresponding to a power supply voltage supplied to a load and an error amplifier having a non-inverting input terminal supplied with a target voltage and an inverting input terminal supplied with a measurement voltage. The error amplifier compares the target voltage and the measurement voltage and outputs a signal for controlling the voltage regulators. Further included in the controller is a correction circuit that applies an offset voltage to the inverting input terminal of the error amplifier when the power supply voltage supplied to the load is reduced.
    Type: Grant
    Filed: September 14, 2013
    Date of Patent: March 1, 2016
    Assignee: Renesas Electronics Corporation
    Inventors: Hiroshi Murakami, Tetsuo Ichino, Shigeru Kurita, Toshio Nagasawa, Takuya Makise
  • Publication number: 20150227154
    Abstract: The disclosed invention provides a controller that can prevent overshoot and undershoot from occurring when a voltage is switched to another voltage without using two types of regulators. Voltage regulators supply a power supply voltage to a CPU. An SVID interface receives a command to change the number of voltage regulators to be actuated among the voltage regulators from outside. A phase clock generating circuit makes a stepwise change of the number of voltage regulators to be actuated from the current number of regulators to the commanded number of regulators after change.
    Type: Application
    Filed: April 23, 2015
    Publication date: August 13, 2015
    Inventors: Hiroshi MURAKAMI, Yukihiko YAMAGUCHI, Takuya MAKISE
  • Patent number: 9046903
    Abstract: The disclosed invention provides a controller that can prevent overshoot and undershoot from occurring when a voltage is switched to another voltage without using two types of regulators. Voltage regulators supply a power supply voltage to a CPU. An SVID interface receives a command to change the number of voltage regulators to be actuated among the voltage regulators from outside. A phase clock generating circuit makes a stepwise change of the number of voltage regulators to be actuated from the current number of regulators to the commanded number of regulators after change.
    Type: Grant
    Filed: November 27, 2012
    Date of Patent: June 2, 2015
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Hiroshi Murakami, Yukihiko Yamaguchi, Takuya Makise
  • Publication number: 20140077781
    Abstract: Provided is a controller that is capable of reducing fall in a waveform of a power supply voltage when the power supply voltage supplied to a CPU is reduced. A controller for controlling voltage regulators includes a differential amplifier that outputs a measurement voltage corresponding to a power supply voltage supplied to a load and an error amplifier having a non-inverting input terminal supplied with a target voltage and an inverting input terminal supplied with a measurement voltage. The error amplifier compares the target voltage and the measurement voltage and outputs a signal for controlling the voltage regulators. Further included in the controller is a correction circuit that applies an offset voltage to the inverting input terminal of the error amplifier when the power supply voltage supplied to the load is reduced.
    Type: Application
    Filed: September 14, 2013
    Publication date: March 20, 2014
    Inventors: Hiroshi Murakami, Tetsuo Ichino, Shigeru Kurita, Toshio Nagasawa, Takuya Makise