Patents by Inventor Takuya Naoe

Takuya Naoe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Silicon substrate processing method for observing defects in semiconductor devices and defect-detecting method
    Patent number: 7682844
    Abstract: A silicon substrate processing method for reducing the thickness of an area of a silicon substrate on which a metal layer is formed to implement a semiconductor integrated circuit is disclosed. The method includes: (A) a process which evenly reduces the thickness of the backside of a silicon substrate to an extent where mechanical strength is maintained and the metal layer on the silicon substrate remains intact; (B) a process which detects defects from the backside of the silicon substrate after the process (A); (C) a process which further reduces the thickness of a defect-containing area of the silicon substrate by processing the backside of the silicon substrate; and (D) a process which measures the thickness of the area of the silicon substrate which is reduced in the process (C).
    Type: Grant
    Filed: May 10, 2006
    Date of Patent: March 23, 2010
    Assignee: Ricoh Company, Ltd.
    Inventors: Takuya Naoe, Hirohiko Endoh
  • Silicon substrate processing method for observing defects in semiconductor devices and defect-detecting method
    Publication number: 20060264005
    Abstract: A silicon substrate processing method for reducing the thickness of an area of a silicon substrate on which a metal layer is formed to implement a semiconductor integrated circuit is disclosed. The method includes: (A) a process which evenly reduces the thickness of the backside of a silicon substrate to an extent where mechanical strength is maintained and the metal layer on the silicon substrate remains intact; (B) a process which detects defects from the backside of the silicon substrate after the process (A); (C) a process which further reduces the thickness of a defect-containing area of the silicon substrate by processing the backside of the silicon substrate; and (D) a process which measures the thickness of the area of the silicon substrate which is reduced in the process (C).
    Type: Application
    Filed: May 10, 2006
    Publication date: November 23, 2006
    Inventors: Takuya Naoe, Hirohiko Endoh