Patents by Inventor Takuya Oga
Takuya Oga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9401319Abstract: A semiconductor device is provided, in which a first lead (11) is joined with the bottom electrode (23) of a MOS-FET (21) with first solder (51), the top electrode (22) of the MOS-FET is joined with an internal lead (31) with second solder (52), the internal lead is joined with a projection (61) of a second lead with third solder (53), and the first lead, second lead, MOS-FET and internal lead are integrally molded using sealing resin (41), wherein the first solder and second solder include support members (54) and (55), respectively, located thereinside and positions of the internal lead and MOS-FET are stabilized by self-alignment.Type: GrantFiled: June 9, 2011Date of Patent: July 26, 2016Assignee: Mitsubishi Electric CorporationInventors: Takuya Oga, Kazuyasu Sakamoto, Tsuyoshi Sugihara, Masaki Kato, Daisuke Nakashima, Tsuyoshi Jida, Gen Tada
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Patent number: 9129949Abstract: A power semiconductor module (100) includes: an electrode plate (2) in which a body portion (2a) and an external connection terminal portion (2b) are integrally formed, and the body portion (2a) is arranged on the same flat surface; a semiconductor chip (1) mounted on one surface (mounting surface) (2c) of the body portion (2a); and a resin package (3) in which the other surface (heat dissipation surface) (2d) of the body portion (2a) is exposed, and the body portion (2a) of the electrode plate (2) and the semiconductor chip (1) are sealed with resin. The heat dissipation surface (2d) is the same surface as the bottom (3a) of the resin package (3); and consequently, heat dissipation properties and reliability are improved and a reduction in size can be achieved.Type: GrantFiled: February 9, 2011Date of Patent: September 8, 2015Assignee: Mitsubishi Electric CorporationInventors: Shinsuke Asada, Kenjiro Nagao, Dai Nakajima, Yuetsu Watanabe, Yoshihito Asao, Takuya Oga, Masaki Kato
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Patent number: 9117688Abstract: Provided is a semiconductor device including: a first MOS-FET (21) joined to a first base plate (11) via solder (61); a second MOS-FET (22) joined to a second base plate (12) via solder (64); a first lead (31) joining the first base plate (11) and the second MOS-FET (22); and a second lead (32) joining the second MOS-FET (22) and a current path member (13) that gives and receives current flowing through the MOS-FETs (21, 22) to and from the outside. The second base plate (12) is more rigid than both the leads (31, 32), a boundary line (D-D) intersects the second base plate (12) without intersecting both the leads (31, 32), the boundary line including a gap portion (52) along which both the MOS-FETs (21, 22) are opposed to each other, extending in the direction in which both the MOS-FETs (21, 22) are not opposed to each other.Type: GrantFiled: April 18, 2011Date of Patent: August 25, 2015Assignee: Mitsubishi Electric CorporationInventors: Takuya Oga, Masaki Kato, Tsuyoshi Sugihara
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Publication number: 20130320818Abstract: Provided is a semiconductor device including: a first MOS-FET (21) joined to a first base plate (11) via solder (61); a second MOS-FET (22) joined to a second base plate (12) via solder (64); a first lead (31) joining the first base plate (11) and the second MOS-FET (22); and a second lead (32) joining the second MOS-FET (22) and a current path member (13) that gives and receives current flowing through the MOS-FETs (21, 22) to and from the outside. The second base plate (12) is more rigid than both the leads (31, 32), a boundary line (D-D) intersects the second base plate (12) without intersecting both the leads (31, 32), the boundary line including a gap portion (52) along which both the MOS-FETs (21, 22) are opposed to each other, extending in the direction in which both the MOS-FETs (21, 22) are not opposed to each other.Type: ApplicationFiled: April 18, 2011Publication date: December 5, 2013Applicant: MITSUBISHI ELECTRIC CORPORATIONInventors: Takuya Oga, Masaki Kato, Tsuyoshi Sugihara
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Publication number: 20130307130Abstract: A semiconductor device is provided, in which a first lead (11) is joined with the bottom electrode (23) of a MOS-FET (21) with first solder (51), the top electrode (22) of the MOS-FET is joined with an internal lead (31) with second solder (52), the internal lead is joined with a projection (61) of a second lead with third solder (53), and the first lead, second lead, MOS-FET and internal lead are integrally molded using sealing resin (41), wherein the first solder and second solder include support members (54) and (55), respectively, located thereinside and positions of the internal lead and MOS-FET are stabilized by self-alignment.Type: ApplicationFiled: June 9, 2011Publication date: November 21, 2013Applicant: MITSUBISHI ELECTRIC CORPORATIONInventors: Takuya Oga, Kazuyasu Sakamoto, Tsuyoshi Sugihara, Masaki Kato, Daisuke Nakashima, Tsuyoshi Jida, Gen Tada
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Publication number: 20130221516Abstract: A power semiconductor module (100) includes: an electrode plate (2) in which a body portion (2a) and an external connection terminal portion (2b) are integrally formed, and the body portion (2a) is arranged on the same flat surface; a semiconductor chip (1) mounted on one surface (mounting surface) (2c) of the body portion (2a); and a resin package (3) in which the other surface (heat dissipation surface) (2d) of the body portion (2a) is exposed, and the body portion (2a) of the electrode plate (2) and the semiconductor chip (1) are sealed with resin. The heat dissipation surface (2d) is the same surface as the bottom (3a) of the resin package (3); and consequently, heat dissipation properties and reliability are improved and a reduction in size can be achieved.Type: ApplicationFiled: February 9, 2011Publication date: August 29, 2013Applicant: MITSUBISHI ELECTRIC CORPORATIONInventors: Shinsuke Asada, Kenjiro Nagao, Dai Nakajima, Yuetsu Watanabe, Yoshihito Asao, Takuya Oga, Masaki Kato
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Patent number: 8299666Abstract: A dynamoelectric machine main body, power circuit modules and a field circuit module, and a control apparatus that has a heatsink that is prepared by die casting, and that is mounted integrally onto the dynamoelectric machine main body are included, the heatsink including a plurality of convex heat receiving portions that are disposed so as to project from a front surface of a base plate, and that have heat receiving surfaces, the power circuit modules and the field circuit module including seal main body portions that are constituted by an electrically insulating resin that seal switching elements so as to expose bottom surfaces of element heat radiating portions on reference surfaces that have a surface shape that corresponds to a shape of the heat receiving surfaces, and electrical insulation supporting layers being interposed between the bottom surfaces of the heat receiving surfaces and the element heat radiating portions.Type: GrantFiled: June 21, 2010Date of Patent: October 30, 2012Assignee: Mitsubishi Electric CorporationInventors: Yuji Shirakata, Dai Nakajima, Masahiko Fujita, Masaki Kato, Kazuyasu Sakamoto, Takuya Oga
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Publication number: 20110175496Abstract: A dynamoelectric machine main body, power circuit modules and a field circuit module, and a control apparatus that has a heatsink that is prepared by die casting, and that is mounted integrally onto the dynamoelectric machine main body are included, the heatsink including a plurality of convex heat receiving portions that are disposed so as to project from a front surface of a base plate, and that have heat receiving surfaces, the power circuit modules and the field circuit module including seal main body portions that are constituted by an electrically insulating resin that seal switching elements so as to expose bottom surfaces of element heat radiating portions on reference surfaces that have a surface shape that corresponds to a shape of the heat receiving surfaces, and electrical insulation supporting layers being interposed between the bottom surfaces of the heat receiving surfaces and the element heat radiating portions.Type: ApplicationFiled: June 21, 2010Publication date: July 21, 2011Applicant: MITSUBISHI ELECTRIC CORPORATIONInventors: Yuji SHIRAKATA, Dai Nakajima, Masahiko Fujita, Masaki Kato, Kazuyasu Sakamoto, Takuya Oga
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Publication number: 20070287226Abstract: Detection of bumps' contact is enabled correctly, and the trouble of crushing a bump too much by an overshoot and connecting with an adjacent bump is abolished. The manufacturing apparatus of a semiconductor device and the manufacturing method of a semiconductor device which make it possible to perform stable flip chip bonding by an easy mechanism.Type: ApplicationFiled: June 8, 2007Publication date: December 13, 2007Applicant: Renesas Technology Corp.Inventors: Takuya Oga, Mitsuhiro Kato