Patents by Inventor Takuya Saegusa

Takuya Saegusa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6766400
    Abstract: A disk array apparatus and an interrupt execution method of the same enables command processing received from an upper level apparatus to be executed in high-speed by reducing rate of the interrupt and substantial processing speed not to decrease even when a write command from the upper level apparatus is continuously executed. A configuration is capable of executing selectively either an immediate interrupt or a delay interrupt. Selection is made to execute the immediate interrupt in the case of a write command while in the case of a read-out command, the delay interrupt is selected. Moreover, Judgment whether or not competition of page occurs when the write command is detected, namely whether or not a region of a cache memory that becomes execution object of the command is used is performed. Only when competition of the page occurs, handling is switched from general delay interrupt to an immediate interrupt.
    Type: Grant
    Filed: June 28, 2001
    Date of Patent: July 20, 2004
    Assignee: NEC Corporation
    Inventors: Kazuya Honma, Takuya Saegusa
  • Patent number: 6745281
    Abstract: Fiber channel connection magnetic disk device and controller which have a plurality of fiber-channel specification supporting port controllers, comprising: a port controller for managing the relationship between an identifier allocated to each host and a logical volume accessible from the host having the identifier; and a local access right management table memory for storing the management state of a logical volume accessible from an indicated host, the port controller being capable of rejecting an access from hosts other than the indicated host.
    Type: Grant
    Filed: June 28, 2000
    Date of Patent: June 1, 2004
    Assignee: NEC Corporation
    Inventor: Takuya Saegusa
  • Patent number: 6546498
    Abstract: A system and method of detecting/eliminating a faulty port in a fiber channel-arbitrated loop, which implements early location/elimination of a port which causes a faulty on a loop in an FC-AL. If no faulty is found in loop 7 at step 914, it can be determined that its own port normally works. Then, an enable instruction is issued to a node destined to a port on the loop 7 from loop 8 at step 915. If a fault is detected in the loop 7 at step 916, it can be determined that the port which has issued the enable instruction at step 915 has been issued faulty. The port which has issued the enable instruction at step 915 is registered as a faulty port at step 918. A bypass instruction is issued from the loop 8 at step 919.
    Type: Grant
    Filed: December 2, 1999
    Date of Patent: April 8, 2003
    Assignee: NEC Corporation
    Inventor: Takuya Saegusa
  • Publication number: 20020004889
    Abstract: A disk array apparatus and an interrupt execution method of the same enables command processing received from an upper level apparatus to be executed in high-speed by reducing rate of the interrupt and substantial processing speed not to decrease even when a write command from the upper level apparatus is continuously executed. A configuration is capable of executing selectively either an immediate interrupt or a delay interrupt. Selection is made to execute the immediate interrupt in the case of a write command while in the case of a read-out command, the delay interrupt is selected. Moreover, Judgment whether or not competition of page occurs when the write command is detected, namely whether or not a region of a cache memory that becomes execution object of the command is used is performed. Only when competition of the page occurs, handling is switched from general delay interrupt to an immediate interrupt.
    Type: Application
    Filed: June 28, 2001
    Publication date: January 10, 2002
    Applicant: NEC CORPORATION
    Inventors: Kazuya Honma, Takuya Saegusa
  • Patent number: 6038681
    Abstract: A multi-array disk apparatus includes first and second logical drives, a first array controller, a second array controller, and interface control circuits. Each of the first and second logical drives has two logical structure disks constituting a pair. The first array controller controls the first logical drive. The second array controller controls the second logical drive. When a fault occurs in the other of the first and second array controllers, the interface control circuits bus-connect one of the first and second array controller in which no fault occurs to the logical structure disk connected to the other of the first and second array controller in which the fault occurs.
    Type: Grant
    Filed: September 3, 1997
    Date of Patent: March 14, 2000
    Assignee: NEC Corporation
    Inventor: Takuya Saegusa