Patents by Inventor Takuya Seino

Takuya Seino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230178378
    Abstract: An etching method includes a preparing step and a removing step. In the preparing step, a substrate is prepared which includes a first film, a second film stacked on the first film, and a hard mask stacked on the second film, such that the second film is etched with the hard mask having a formed pattern as a mask until the first film is exposed. In the removing step, the hard mask is removed using a fluorine-containing gas. Further, the removing step is executed for a time longer than a first time from a start of a supply of the fluorine-containing gas to a start of an etching of the hard mask, and shorter than a second time from the start of the supply of the fluorine-containing gas to a start of an etching of the first film.
    Type: Application
    Filed: January 18, 2023
    Publication date: June 8, 2023
    Applicant: Tokyo Electron Limited
    Inventors: Noriaki OKABE, Naoki SHINDO, Gen YOU, Takuya SEINO
  • Publication number: 20230051865
    Abstract: The PVD apparatus includes a chamber, a plurality of stages, a first target holder, a power supply mechanism, and a shield. The plurality of stages are provided inside the chamber, and each of the plurality of stages is configured to place at least one substrate on an upper surface thereof. The first target holder is configured to hold at least one target provided for one stage, the target being exposed to a space inside the chamber. The power supply mechanism supplies power to the target via the first target holder. The shield is provided inside the chamber and a part of the shield is disposed between a first stage and a second stage in the plurality of stages, and between a first processing space on the first stage and a second processing space on the second stage.
    Type: Application
    Filed: October 28, 2022
    Publication date: February 16, 2023
    Applicant: Tokyo Electron Limited
    Inventors: Takuya SEINO, Yasushi KODASHIMA, Naoki WATANABE, Hiroyuki TOSHIMA, Masato SHINADA, Tetsuya MIYASHITA
  • Publication number: 20210280419
    Abstract: A method of processing a wafer includes preparing a wafer having a substrate and a silicon-containing film formed on the substrate; forming a hard mask on the silicon-containing film; forming a pattern on the hard mask by etching the hard mask; and etching the silicon-containing film using the hard mask on which the pattern is formed, wherein the hard mask has a first film formed on the silicon-containing film and containing tungsten, and a second film formed on the first film and containing zirconium or titanium and oxygen.
    Type: Application
    Filed: March 3, 2021
    Publication date: September 9, 2021
    Inventors: Noriaki OKABE, Takuya SEINO, Ryota KOZUKA, Yasuhiro HAMADA, Yuutaro KISHI
  • Patent number: 11035034
    Abstract: The present invention provides a film formation method and a film formation apparatus which can fabricate an epitaxial film with +c polarity by a sputtering method. In one embodiment of the present invention, the film formation method of epitaxially growing a semiconductor thin film with a wurtzite structure by the sputtering method on an epitaxial growth substrate heated to a predetermined temperature by a heater includes the following steps. First, the substrate is disposed on a substrate holding portion including the heater to be located at a predetermined distance away from the heater. Then, the epitaxial film of the semiconductor film with the wurtzite structure is formed on the substrate with the impedance of the substrate holding portion being adjusted.
    Type: Grant
    Filed: January 26, 2017
    Date of Patent: June 15, 2021
    Assignee: CANON ANELVA CORPORATION
    Inventors: Yoshiaki Daigo, Takuya Seino, Yoshitaka Ohtsuka, Hiroyuki Makita, Sotaro Ishibashi, Kazuto Yamanaka
  • Patent number: 10361363
    Abstract: A method includes: a first film formation process forming a film by sputtering a first insulator target when a projection plane of the first insulator target on a plane including a front face of a substrate is in a first state; and a second film formation process forming a film by sputtering a second insulator target when a projection plane of the second insulator target formed on the plane including the front face of the substrate is in a second state different from the first state. The second film formation process provides the insulating film having a second characteristic variation having opposite tendency to a first characteristic variation in the film provided by the first film formation process, the first characteristic variation occurring from a center portion to a peripheral portion of the substrate, the second characteristic variation occurring at least partly from the center portion to the peripheral portion.
    Type: Grant
    Filed: May 31, 2016
    Date of Patent: July 23, 2019
    Assignee: CANON ANELVA CORPORATION
    Inventors: Yuichi Otani, Takuya Seino
  • Patent number: 10153426
    Abstract: This invention provides a manufacturing method of a magnetoresistive effect element having a higher MR ratio than a conventional element. A manufacturing method of a magnetoresistive effect element of an embodiment of the invention includes: a step of forming a tunnel barrier layer on a substrate, on a surface of which one of a magnetization free layer and a magnetization fixed layer is formed; a step of cooling the substrate after the step of forming a tunnel barrier layer; a step of forming an other one of the magnetization free layer and the magnetization fixed layer on the tunnel barrier layer after the step of cooling; and a step of raising a temperature of the substrate after the step of forming the other one of the magnetization free layer and the magnetization fixed layer.
    Type: Grant
    Filed: April 21, 2016
    Date of Patent: December 11, 2018
    Assignee: CANON ANELVA CORPORATION
    Inventors: Takuya Seino, Yuichi Otani, Kazumasa Nishimura
  • Patent number: 10083830
    Abstract: It was found out that when radicals generated by plasma are fed to a treatment chamber via a plurality of holes (111) formed on a partition plate which separates a plasma-forming chamber (108) from the treatment chamber, and the radicals are mixed with a treatment gas which is separately fed to the treatment chamber, the excitation energy of the radicals is suppressed and thereby the substrate surface treatment at high Si-selectivity becomes possible, which makes it possible to conduct the surface treatment of removing native oxide film and organic matter without deteriorating the flatness of the substrate surface. The radicals in the plasma are fed to the treatment chamber via radical-passing holes (111) of a plasma-confinement electrode plate (110) for plasma separation, the treatment gas is fed to the treatment chamber (121) to be mixed with the radicals in the treatment chamber, and then the substrate surface is cleaned by the mixed atmosphere of the radicals and the treatment gas.
    Type: Grant
    Filed: May 23, 2016
    Date of Patent: September 25, 2018
    Assignee: CANON ANELVA CORPORATION
    Inventors: Takuya Seino, Manabu Ikemoto, Kimiko Mashimo
  • Patent number: 9929340
    Abstract: An embodiment of the present invention is a method of manufacturing a perpendicular MTJ device which includes: a first stacked structure including a pair of CoFeB layers sandwiching an MgO layer; and a second stacked structure including a multilayer, the method comprising the steps of: forming one of the first and second stacked structures on a substrate; inspecting a property of the substrate with the one of the first and second stacked structures formed thereon while exposing the substrate to the atmosphere; and forming another one of the first and second stacked structures on the substrate with the one of the first and second stacked structures formed thereon.
    Type: Grant
    Filed: July 19, 2017
    Date of Patent: March 27, 2018
    Assignee: CANON ANELVA CORPORATION
    Inventor: Takuya Seino
  • Patent number: 9905441
    Abstract: An oxidation process apparatus according to one embodiment of the present invention includes: a substrate holder provided in a processing chamber and having a substrate holding surface; a gas introduction unit for introducing an oxygen gas; a cylindrical member; and a substrate holder drive unit for changing relative positions of the substrate holder and the cylindrical member to allow the substrate holding surface and the cylindrical member to form an oxidation process space. The cylindrical member is provided so as to form a gap between the cylindrical member and the substrate holder during formation of the space. The oxygen gas is introduced restrictively into the space. The oxygen gas introduced from the gas introduction unit is evacuated through the gap.
    Type: Grant
    Filed: June 17, 2015
    Date of Patent: February 27, 2018
    Assignee: CANON ANELVA CORPORATION
    Inventors: Yoshimitsu Shimane, Takuya Seino
  • Patent number: 9865805
    Abstract: Provided is a method for manufacturing a magnetoresistive element, including a step of forming a tunnel barrier layer, wherein the step of forming the tunnel barrier layer includes a deposition step of depositing a metal film on top of a substrate, and an oxidation step of subjecting the metal film to an oxidation process. The oxidation step includes holding the substrate having Mg formed thereon, on a substrate holder in a processing container in which the oxidation process is performed, supplying an oxygen gas to the substrate by introducing the oxygen gas into the processing container, at a temperature at which Mg does not sublime, and heating the substrate after the introduction of the oxygen gas.
    Type: Grant
    Filed: June 17, 2015
    Date of Patent: January 9, 2018
    Assignee: CANON ANELVA CORPORATION
    Inventors: Takuya Seino, Kazumasa Nishimura, Hiroki Okuyama, Yuichi Otani, Yuta Murooka, Yoshimitsu Shimane
  • Patent number: 9853207
    Abstract: A magnetoresistance effect element of the present invention includes: a barrier layer; a reference layer formed on one surface of the barrier layer; a free layer formed on the other surface of the barrier layer; and a pinned layer placed on the opposite side of the reference layer from the barrier layer. The pinned layer includes a structure obtained by stacking Ni, Co, Pt, Co, Ru, Co, Pt, Co, and Ni layers in this order.
    Type: Grant
    Filed: September 7, 2016
    Date of Patent: December 26, 2017
    Assignee: CANON ANELVA CORPORATION
    Inventors: Takuya Seino, Kazumasa Nishimura, Toshikazu Irisawa, Saki Shibuichi
  • Publication number: 20170317274
    Abstract: An embodiment of the present invention is a method of manufacturing a perpendicular MTJ device which includes: a first stacked structure including a pair of CoFeB layers sandwiching an MgO layer; and a second stacked structure including a multilayer, the method comprising the steps of: forming one of the first and second stacked structures on a substrate; inspecting a property of the substrate with the one of the first and second stacked structures formed thereon while exposing the substrate to the atmosphere; and forming another one of the first and second stacked structures on the substrate with the one of the first and second stacked structures formed thereon.
    Type: Application
    Filed: July 19, 2017
    Publication date: November 2, 2017
    Inventor: Takuya Seino
  • Publication number: 20170145588
    Abstract: The present invention provides a film formation method and a film formation apparatus which can fabricate an epitaxial film with +c polarity by a sputtering method. In one embodiment of the present invention, the film formation method of epitaxially growing a semiconductor thin film with a wurtzite structure by the sputtering method on an epitaxial growth substrate heated to a predetermined temperature by a heater includes the following steps. First, the substrate is disposed on a substrate holding portion including the heater to be located at a predetermined distance away from the heater. Then, the epitaxial film of the semiconductor film with the wurtzite structure is formed on the substrate with the impedance of the substrate holding portion being adjusted.
    Type: Application
    Filed: January 26, 2017
    Publication date: May 25, 2017
    Inventors: YOSHIAKI DAIGO, TAKUYA SEINO, YOSHITAKA OHTSUKA, HIROYUKI MAKITA, SOTARO ISHIBASHI, KAZUTO YAMANAKA
  • Publication number: 20160380187
    Abstract: A magnetoresistance effect element of the present invention includes: a barrier layer; a reference layer formed on one surface of the barrier layer; a free layer formed on the other surface of the barrier layer; and a pinned layer placed on the opposite side of the reference layer from the barrier layer. The pinned layer includes a structure obtained by stacking Ni, Co, Pt, Co, Ru, Co, Pt, Co, and Ni layers in this order.
    Type: Application
    Filed: September 7, 2016
    Publication date: December 29, 2016
    Inventors: Takuya Seino, Kazumasa Nishimura, Toshikazu Irisawa, Saki Shibuichi
  • Publication number: 20160343565
    Abstract: It was found out that when radicals generated by plasma are fed to a treatment chamber via a plurality of holes (111) formed on a partition plate which separates a plasma-forming chamber (108) from the treatment chamber, and the radicals are mixed with a treatment gas which is separately fed to the treatment chamber, the excitation energy of the radicals is suppressed and thereby the substrate surface treatment at high Si-selectivity becomes possible, which makes it possible to conduct the surface treatment of removing native oxide film and organic matter without deteriorating the flatness of the substrate surface. The radicals in the plasma are fed to the treatment chamber via radical-passing holes (111) of a plasma-confinement electrode plate (110) for plasma separation, the treatment gas is fed to the treatment chamber (121) to be mixed with the radicals in the treatment chamber, and then the substrate surface is cleaned by the mixed atmosphere of the radicals and the treatment gas.
    Type: Application
    Filed: May 23, 2016
    Publication date: November 24, 2016
    Inventors: Takuya SEINO, Manabu IKEMOTO, Kimiko MASHIMO
  • Publication number: 20160276583
    Abstract: A method includes: a first film formation process forming a film by sputtering a first insulator target when a projection plane of the first insulator target on a plane including a front face of a substrate is in a first state; and a second film formation process forming a film by sputtering a second insulator target when a projection plane of the second insulator target formed on the plane including the front face of the substrate is in a second state different from the first state. The second film formation process provides the insulating film having a second characteristic variation having opposite tendency to a first characteristic variation in the film provided by the first film formation process, the first characteristic variation occurring from a center portion to a peripheral portion of the substrate, the second characteristic variation occurring at least partly from the center portion to the peripheral portion.
    Type: Application
    Filed: May 31, 2016
    Publication date: September 22, 2016
    Inventors: Yuichi Otani, Takuya Seino
  • Patent number: 9437702
    Abstract: It is an object of the present invention to provide an electronic component manufacturing method, capable of suppressing reduction in a trench opening and suppressing diffusion of a metal film embedded in a trench. An embodiment of the present invention is an electronic component manufacturing method, including the steps of: forming a first electrode constituting layer (e.g., a TiAl film) in a recess (e.g., a trench) formed in a workpiece; forming an ultrathin barrier layer (e.g., a TiAlN film) by forming a nitride layer by plasma-nitriding a surface of the first electrode constituting layer; and forming a second electrode constituting layer (e.g., an Al wiring layer) on the ultrathin barrier layer.
    Type: Grant
    Filed: July 10, 2014
    Date of Patent: September 6, 2016
    Assignee: CANON ANELVA CORPORATION
    Inventors: Akira Matsuo, Yohsuke Shibuya, Naomu Kitano, Eitaroh Morimoto, Koji Yamazaki, Yu Sato, Takuya Seino
  • Publication number: 20160240772
    Abstract: This invention provides a manufacturing method of a magnetoresistive effect element having a higher MR ratio than a conventional element. A manufacturing method of a magnetoresistive effect element of an embodiment of the invention includes: a step of forming a tunnel barrier layer on a substrate, on a surface of which one of a magnetization free layer and a magnetization fixed layer is formed; a step of cooling the substrate after the step of forming a tunnel barrier layer; a step of forming an other one of the magnetization free layer and the magnetization fixed layer on the tunnel barrier layer after the step of cooling; and a step of raising a temperature of the substrate after the step of forming the other one of the magnetization free layer and the magnetization fixed layer.
    Type: Application
    Filed: April 21, 2016
    Publication date: August 18, 2016
    Inventors: Takuya Seino, Yuichi Otani, Kazumasa Nishimura
  • Publication number: 20160005958
    Abstract: Provided is a method for manufacturing a magnetoresistive element, including a step of forming a tunnel barrier layer, wherein the step of forming the tunnel barrier layer includes a deposition step of depositing a metal film on top of a substrate, and an oxidation step of subjecting the metal film to an oxidation process. The oxidation step includes holding the substrate having Mg formed thereon, on a substrate holder in a processing container in which the oxidation process is performed, supplying an oxygen gas to the substrate by introducing the oxygen gas into the processing container, at a temperature at which Mg does not sublime, and heating the substrate after the introduction of the oxygen gas.
    Type: Application
    Filed: June 17, 2015
    Publication date: January 7, 2016
    Inventors: Takuya Seino, Kazumasa Nishimura, Hiroki Okuyama, Yuichi Otani, Yuta Murooka, Yoshimitsu Shimane
  • Publication number: 20150318466
    Abstract: An oxidation process apparatus according to one embodiment of the present invention includes: a substrate holder provided in a processing chamber and having a substrate holding surface; a gas introduction unit for introducing an oxygen gas; a cylindrical member; and a substrate holder drive unit for changing relative positions of the substrate holder and the cylindrical member to allow the substrate holding surface and the cylindrical member to form an oxidation process space. The cylindrical member is provided so as to form a gap between the cylindrical member and the substrate holder during formation of the space. The oxygen gas is introduced restrictively into the space. The oxygen gas introduced from the gas introduction unit is evacuated through the gap.
    Type: Application
    Filed: June 17, 2015
    Publication date: November 5, 2015
    Inventors: Yoshimitsu Shimane, Takuya Seino