Abstract: A method, system and product comprising: obtaining a gate-level representation of a quantum circuit, wherein the gate-level representation comprises a set of quantum gates defining operations on a set of qubits, wherein the gate-level representation comprises a gate-level implementation of a functional block of a functional-level representation of the quantum circuit, wherein the functional block defines an operation of the quantum circuit over at least two cycles; obtaining metadata from a functional-level processing component, wherein the metadata comprise an artifact associated with the gate-level implementation of the functional block; and compiling the gate-level representation of the quantum circuit, wherein said compiling is performed based on the metadata.

Abstract: A method, system and product comprising: obtaining a functional-level representation of a quantum circuit that comprises a functional block; obtaining an indication of one or more resources that are available to the functional block, the indication regarding a range of cycles and an indication regarding a number of qubits; dynamically generating a gate-level implementation of the functional block that adheres to the indication of the one or more resources; and synthesizing a gate-level implementation of the quantum circuit, wherein the gate-level implementation of the quantum circuit comprises the gate-level implementation of the functional block.

Abstract: A method, system and product comprising: obtaining a functional-level representation of a quantum circuit that comprises a functional block, wherein the functional block defines an operation of the quantum circuit over at least two cycles; selecting from a function library an implementation for the functional block, wherein the function library comprises a plurality of alternative implementations of the functional block, wherein each implementation of the plurality of alternative implementations is configured to provide a same functionality of the functional block and is applicable to a quantum computer to be used for executing the quantum circuit; and generating a gate-level representation of the quantum circuit that comprises the implementation for the functional block.

Abstract: A method, system and product for synthesizing a quantum circuit using Constraint Satisfaction Problem (CSP). A functional-level representation of a quantum circuit that includes a first functional blocks and a second functional block is obtained. The functional-level representation defines a relationship between the first functional block and the second functional block. A CSP that is determined based on the functional-level representation, is automatically solved. The CSP is solved by identifying a first and second implementations to the first and second functional blocks that adhere to the CSP. A gate-level representation of the quantum circuit is synthesized using the first and second implementations.

Abstract: A method, system and product comprising: obtaining a directed acyclic graph representing a quantum circuit, the directed acyclic graph comprising a set of blocks and connections therebetween, wherein a connection between a first block and a second block indicates passing an output value of a qubit outputted by the first block to be an input value of a qubit manipulated by the second block; determining a Constraint Satisfaction Problem (CSP) based on the directed acyclic graph, wherein the CSP comprises one or more constraints based on the connections defined by the directed acyclic graph; automatically solving the CSP, wherein said automatically solving comprises selecting an implementation to each block that adheres to the one or more constraints; and synthesizing a gate-level representation of the quantum circuit based on the solution to the CSP.

Abstract: A method, system and product comprising: obtaining a functional-level representation of a quantum circuit that comprises a functional block; synthesizing a gate-level representation of the quantum circuit based on the functional-level representation of the quantum circuit, wherein the gate-level representation of the quantum circuit comprises a first sub-circuit and a second sub-circuit; providing the gate-level representation to a gate-level processing component; obtaining, from the gate-level processing component, a change indication indicating that the gate-level processing component modified the first sub-circuit, whereby determining a modified first sub-circuit; in response to the change indication, synthesizing a modified second sub-circuit based on a knowledge of an existence of the modified first sub-circuit.