Patents by Inventor Tal Margalith
Tal Margalith has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11411137Abstract: A III-nitride optoelectronic device includes at least one n-type layer, an active region grown on or above the n-type layer, at least one p-type layer grown on or above the active region, and a tunnel junction grown on or above the p-type layer. A conductive oxide may be wafer bonded on or above the tunnel junction, wherein the conductive oxide comprises a transparent conductor and may contain light extraction features on its non-bonded face. The tunnel junction also enables monolithic incorporation of electrically-injected and optically-pumped III-nitride layers, wherein the optically-pumped III-nitride layers comprise high-indium-content III-nitride layers formed as quantum wells (QWs) that are grown on or above the tunnel junction. The optically-pumped high-indium-content III-nitride layers emit light at a longer wavelength than the electrically-injected III-nitride layers.Type: GrantFiled: February 6, 2017Date of Patent: August 9, 2022Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIAInventors: Asad J. Mughal, Stacy J. Kowsz, Robert M. Farrell, Benjamin P. Yonkee, Erin C. Young, Christopher D. Pynn, Tal Margalith, James S. Speck, Shuji Nakamura, Steven P. DenBaars
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Publication number: 20220239068Abstract: Vertical Cavity Surface Emitting Laser (VCSEL) configurations are disclosed. In a first example, the VCSEL includes a III-Nitride active region between a p-type III-Nitride layer and an n-type III-Nitride layer; and a curved minor on or above the p-type III-Nitride layer. The curved mirror can be formed in a III-Nitride layer or a Transparent Oxide (TO) material and enables the formation of a long VCSEL cavity that improves VCSEL lifetime, VCSEL output power, VCSEL power efficiency and VCSEL reliability. In a second example, the VCSEL has an active region with a high indium content. In a third example, the VCSEL is transparent.Type: ApplicationFiled: May 28, 2020Publication date: July 28, 2022Applicant: The Regents of the University of CaliforniaInventors: Jared Kearns, Daniel A. Cohen, Joonho Back, Nathan Palmquist, Tal Margalith, Steven P. DenBaars, Shuji Nakamura
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Publication number: 20220181513Abstract: A hybrid growth method for III-nitride tunnel junction devices uses metal-organic chemical vapor deposition (MOCVD) to grow one or more light-emitting or light-absorbing structures and ammonia-assisted or plasma-assisted molecular beam epitaxy (MBE) to grow one or more tunnel junctions. Unlike p-type gallium nitride (p-GaN) grown by MOCVD, p-GaN grown by MBE is conductive as grown, which allows for its use in a tunnel junction. Moreover, the doping limits of MBE materials are higher than MOCVD materials. The tunnel junctions can be used to incorporate multiple active regions into a single device. In addition, n-type GaN (n-GaN) can be used as a current spreading layer on both sides of the device, eliminating the need for a transparent conductive oxide (TCO) layer or a silver (Au) mirror.Type: ApplicationFiled: December 1, 2021Publication date: June 9, 2022Applicant: The Regents of the University of CaliforniaInventors: Erin C. Young, Benjamin P. Yonkee, John T. Leonard, Tal Margalith, James S. Speck, Steven P. DenBaars, Shuji Nakamura
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Publication number: 20220005980Abstract: Micro-scale light emitting diodes (micro-LEDs) with ultra-low leakage current results from a sidewall passivation method for the micro-LEDs using a chemical treatment followed by conformal dielectric deposition, which reduces or eliminates sidewall damage and surface recombination, and the passivated micro-LEDs can achieve higher efficiency than micro-LEDs without sidewall treatments. Moreover, the sidewall profile of micro-LEDs can be altered by varying the conditions of chemical treatment.Type: ApplicationFiled: October 31, 2019Publication date: January 6, 2022Applicant: The Regents of the University of CaliforniaInventors: Tal Margalith, Matthew S. Wong, Lesley Chan, Steven P. DenBaars
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Patent number: 11217722Abstract: A hybrid growth method for III-nitride tunnel junction devices uses metal-organic chemical vapor deposition (MOCVD) to grow one or more light-emitting or light-absorbing structures and ammonia-assisted or plasma-assisted molecular beam epitaxy (MBE) to grow one or more tunnel junctions. Unlike p-type gallium nitride (p-GaN) grown by MOCVD, p-GaN grown by MBE is conductive as grown, which allows for its use in a tunnel junction. Moreover, the doping limits of MBE materials are higher than MOCVD materials. The tunnel junctions can be used to incorporate multiple active regions into a single device. In addition, n-type GaN (n-GaN) can be used as a current spreading layer on both sides of the device, eliminating the need for a transparent conductive oxide (TCO) layer or a silver (Au) mirror.Type: GrantFiled: July 11, 2016Date of Patent: January 4, 2022Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIAInventors: Erin C. Young, Benjamin P. Yonkee, John T. Leonard, Tal Margalith, James S. Speck, Steven P. DenBaars, Shuji Nakamura
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Publication number: 20200335663Abstract: A III-nitride optoelectronic device includes at least one n-type layer, an active region grown on or above the n-type layer, at least one p-type layer grown on or above the active region, and a tunnel junction grown on or above the p-type layer. A conductive oxide may be wafer bonded on or above the tunnel junction, wherein the conductive oxide comprises a transparent conductor and may contain light extraction features on its non-bonded face. The tunnel junction also enables monolithic incorporation of electrically-injected and optically-pumped III-nitride layers, wherein the optically-pumped III-nitride layers comprise high-indium-content III-nitride layers formed as quantum wells (QWs) that are grown on or above the tunnel junction. The optically-pumped high-indium-content III-nitride layers emit light at a longer wavelength than the electrically-injected III-nitride layers.Type: ApplicationFiled: February 6, 2017Publication date: October 22, 2020Applicant: The Regents of the University of CaliforniaInventors: Asad J. Mughal, Stacy J. Kowsz, Robert M. Farrell, Benjamin P. Yonkee, Erin C. Young, Christopher D. Pynn, Tal Margalith, James S. Speck, Shuji Nakamura, Steven P. DenBaars
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Patent number: 10685835Abstract: A III-nitride tunnel junction with a modified p-n interface, wherein the modified p-n interface includes a delta-doped layer to reduce tunneling resistance. The delta-doped layer may be doped using donor atoms comprised of Oxygen (O), Germanium (Ge) or Silicon (Si); acceptor atoms comprised of Magnesium (Mg) or Zinc (Zn); or impurities comprised of Iron (Fe) or Carbon (C).Type: GrantFiled: November 1, 2016Date of Patent: June 16, 2020Assignees: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA, KING ABDULAZIZ CITY FOR SCIENCE AND TECHNOLOGY (KACST)Inventors: Benjamin P. Yonkee, Erin C. Young, John T. Leonard, Tal Margalith, James S. Speck, Steven P. DenBaars, Shuji Nakamura
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Publication number: 20200056999Abstract: Embodiments of the present disclosure describe a colorimetric sensor comprising a substrate including an activated furan and configured to undergo a color change upon detecting an amine. Embodiments of the present disclosure describe a method of using a colorimetric sensor comprising applying an activated furan to a substrate, providing the substrate to a medium, and detecting an amine in the medium via change in color of the substrate. Embodiments of the present disclosure further describe a method of detecting an amine comprising contacting furfural with a cyclic acceptor group to form an activated furan for detecting amines, and contacting the activated furan with an amine to produce a colored donor-acceptor Stenhouse adduct.Type: ApplicationFiled: October 19, 2017Publication date: February 20, 2020Inventors: Javier Read de Alaniz, Craig Hawker, James Hemmer, Yvonne Diaz, Abigail S. Knight, Zachariah A. Page, Tal Margalith
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Publication number: 20190074404Abstract: A hybrid growth method for III-nitride tunnel junction devices uses metal-organic chemical vapor deposition (MOCVD) to grow one or more light-emitting or light-absorbing structures and ammonia-assisted or plasma-assisted molecular beam epitaxy (MBE) to grow one or more tunnel junctions. Unlike p-type gallium nitride (p-GaN) grown by MOCVD, p-GaN grown by MBE is conductive as grown, which allows for its use in a tunnel junction. Moreover, the doping limits of MBE materials are higher than MOCVD materials. The tunnel junctions can be used to incorporate multiple active regions into a single device. In addition, n-type GaN (n-GaN) can be used as a current spreading layer on both sides of the device, eliminating the need for a transparent conductive oxide (TCO) layer or a silver (Au) mirror.Type: ApplicationFiled: July 11, 2016Publication date: March 7, 2019Applicant: The Regents of the University of CaliforniaInventors: Erin C. Young, Benjamin P. Yonkee, John T. Leonard, Tal Margalith, James S. Speck, Steven P. DenBaars, Shuji Nakamura
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Publication number: 20180374699Abstract: A III-nitride tunnel junction with a modified p-n interface, wherein the modified p-n interface includes a delta-doped layer to reduce tunneling resistance. The delta-doped layer may be doped using donor atoms comprised of Oxygen (O), Germanium (Ge) or Silicon (Si); acceptor atoms comprised of Magnesium (Mg) or Zinc (Zn); or impurities comprised of Iron (Fe) or Carbon (C).Type: ApplicationFiled: November 1, 2016Publication date: December 27, 2018Applicant: The Regents of the University of CaliforniaInventors: Benjamin P. Yonkee, Erin C. Young, John T. Leonard, Tal Margalith, James S. Speck, Steven P. DenBaars, Shuji Nakamura
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Patent number: 8911518Abstract: The present disclosure relates generally to semiconductor techniques. More specifically, embodiments of the present disclosure provide methods for efficiently dicing substrates containing gallium and nitrogen material. Additionally, the present disclosure provides techniques resulting in an optical device comprising a substrate having a dislocation bundle center being used as a conductive region for a contact.Type: GrantFiled: June 7, 2012Date of Patent: December 16, 2014Assignee: Soraa, Inc.Inventors: Arpan Chakraborty, Michael R. Krames, Tal Margalith, Rafael Aldaz
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Patent number: 8450754Abstract: LED layers are grown over a sapphire substrate. Individual flip chip LEDs are formed by trenching or masked ion implantation. Modules containing a plurality of LEDs are diced and mounted on a submount wafer. A submount metal pattern or a metal pattern formed on the LEDs connects the LEDs in a module in series. The growth substrate is then removed, such as by laser lift-off. A semi-insulating layer is formed, prior to or after mounting, that mechanically connects the LEDs together. The semi-insulating layer may be formed by ion implantation of a layer between the substrate and the LED layers. PEC etching of the semi-insulating layer, exposed after substrate removal, may be performed by biasing the semi-insulating layer. The submount is then diced to create LED modules containing series-connected LEDs.Type: GrantFiled: October 10, 2011Date of Patent: May 28, 2013Assignees: Koninklijke Philips Electronics N.V., Philips Lumileds Lighting Company, LLCInventors: Michael R. Krames, John E. Epler, Daniel A. Steigerwald, Tal Margalith
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Publication number: 20120205623Abstract: A method for forming non-polar (Al,B,In,Ga)N quantum well and heterostructure materials and devices. Non-polar (11 20) a-plane GaN layers are grown on an r-plane (11 02) sapphire substrate using MOCVD. These non-polar (11 20) a-plane GaN layers comprise templates for producing non-polar (Al,B,In,Ga)N quantum well and heterostructure materials and devices.Type: ApplicationFiled: April 26, 2012Publication date: August 16, 2012Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIAInventors: Michael D. Craven, Stacia Keller, Steven P. DenBaars, Tal Margalith, James Stephen Speck, Shuji Nakamura, Umesh K. Mishra
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Patent number: 8188458Abstract: A method for forming non-polar (Al,B,In,Ga)N quantum well and heterostructure materials and devices. Non-polar (11 20) a-plane GaN layers are grown on an r-plane (1 102) sapphire substrate using MOCVD. These non-polar (11 20) a-plane GaN layers comprise templates for producing non-polar (Al,B,In,Ga)N quantum well and heterostructure materials and devices.Type: GrantFiled: May 3, 2011Date of Patent: May 29, 2012Assignee: The Regents of the University of CaliforniaInventors: Michael D. Craven, Stacia Keller, Steven P. DenBaars, Tal Margalith, James S. Speck, Shuji Nakamura, Umesh K. Mishra
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Publication number: 20120025231Abstract: LED layers are grown over a sapphire substrate. Individual flip chip LEDs are formed by trenching or masked ion implantation. Modules containing a plurality of LEDs are diced and mounted on a submount wafer. A submount metal pattern or a metal pattern formed on the LEDs connects the LEDs in a module in series. The growth substrate is then removed, such as by laser lift-off. A semi-insulating layer is formed, prior to or after mounting, that mechanically connects the LEDs together. The semi-insulating layer may be formed by ion implantation of a layer between the substrate and the LED layers. PEC etching of the semi-insulating layer, exposed after substrate removal, may be performed by biasing the semi-insulating layer. The submount is then diced to create LED modules containing series-connected LEDs.Type: ApplicationFiled: October 10, 2011Publication date: February 2, 2012Applicant: KONINKLIJKE PHILIPS ELECTRONICS N.V.Inventors: Michael R. Krames, John E. Epler, Daniel A. Steigerwald, Tal Margalith
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Patent number: 8062916Abstract: LED layers are grown over a sapphire substrate. Individual flip chip LEDs are formed by trenching or masked ion implantation. Modules containing a plurality of LEDs are diced and mounted on a submount wafer. A submount metal pattern or a metal pattern formed on the LEDs connects the LEDs in a module in series. The growth substrate is then removed, such as by laser lift-off. A semi-insulating layer is formed, prior to or after mounting, that mechanically connects the LEDs together. The semi-insulating layer may be formed by ion implantation of a layer between the substrate and the LED layers. PEC etching of the semi-insulating layer, exposed after substrate removal, may be performed by biasing the semi-insulating layer. The submount is then diced to create LED modules containing series-connected LEDs.Type: GrantFiled: November 6, 2008Date of Patent: November 22, 2011Assignees: Koninklijke Philips Electronics N.V., Philips Lumileds Lighting CompanyInventors: Michael R. Krames, John E. Epler, Daniel A. Steigerwald, Tal Margalith
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Publication number: 20110204329Abstract: A method for forming non-polar (Al,B,In,Ga)N quantum well and heterostructure materials and devices. Non-polar (11 20) a-plane GaN layers are grown on an r-plane (1 102) sapphire substrate using MOCVD. These non-polar (11 20) a-plane GaN layers comprise templates for producing non-polar (Al,B,In,Ga)N quantum well and heterostructure materials and devices.Type: ApplicationFiled: May 3, 2011Publication date: August 25, 2011Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIAInventors: Michael D. Craven, Stacia Keller, Steven P. DenBaars, Tal Margalith, James Stephen Speck, Shuji Nakamura, Umesh K. Mishra
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Patent number: 7982208Abstract: A method for forming non-polar (Al,B,In,Ga)N quantum well and heterostructure materials and devices. Non-polar (11 20) a-plane GaN layers are grown on an r-plane (1 102) sapphire substrate using MOCVD. These non-polar (11 20) a-plane GaN layers comprise templates for producing non-polar (Al, B, In, Ga)N quantum well and heterostructure materials and devices.Type: GrantFiled: June 21, 2006Date of Patent: July 19, 2011Assignee: The Regents of the University of CaliforniaInventors: Michael D. Craven, Stacia Keller, Steven P. Denbaars, Tal Margalith, James Stephen Speck, Shuji Nakamura, Umesh K. Mishra
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Patent number: 7977132Abstract: Light emitting diode (LED) dies are fabricated by forming LED layers including a first conductivity type layer, a light-emitting layer, and a second conductivity type layer. Trenches are formed in the LED layers that reach at least partially into the first conductivity type layer. Electrically insulation regions are formed in or next to at least portions of the first conductivity type layer along the die edges. A first conductivity bond pad layer is formed to electrically contact the first conductivity type layer and extend over the singulation streets between the LED dies. A second conductivity bond pad layer is formed to electrically contact the second conductivity type layer, and extend over the singulation streets between the LED dies and the electrically insulated portions of the first conductivity type layer. The LED dies are mounted to submounts and the LED dies are singulated along the singulation streets between the LED dies.Type: GrantFiled: May 6, 2009Date of Patent: July 12, 2011Assignees: Koninklijke Philips Electronics N.V., Philps Lumileds Lighting Company, LLCInventors: Tal Margalith, Stefano Schiaffino, Henry Kwong-Hin Choy
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Publication number: 20110018013Abstract: A light-emitting diode (LED) is fabricated by forming the LED segments with bond pads covering greater than 85% of a mounting surface of the LED segments and isolation trenches that electrically isolate the LED segments, mounting the LED segments on a submount with a bond pad that couples two or more bond pads from the LED segments, and applying a laser lift-off to remove the growth substrate from the LED layer.Type: ApplicationFiled: July 21, 2009Publication date: January 27, 2011Applicants: KONINKLIJKE PHILIPS ELECTRONICS N.V., PHILIPS LUMILEDS LIGHTING COMPANY, LLCInventors: Tal MARGALITH, Henry Kwong-Hin CHOY, John E. EPLER, Stefano SCHIAFFINO