Patents by Inventor Tal Mazor

Tal Mazor has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Integrated circuit and a method for designing a boundary scan super-cell
    Patent number: 7761760
    Abstract: A method for designing an integrated circuit, the method includes: providing an initial definition of a boundary scan register that includes identical super-cells adapted to be connected to multiple pin types; and determining the configuration of each super-cell by providing at least one pin type indication signal to each super-cell. An integrated circuit that includes a boundary scan super-cell, the boundary scan super-cell includes first circuitry adapted to be connected to at least one type of integrated circuit pin; characterized by further including a second circuitry, connected to first circuitry, wherein the second circuitry is adapted to receive at least one pin type indication signal and in response allows the boundary scan super-cell to be connected to at least one additional type of an integrated circuit pin.
    Type: Grant
    Filed: May 4, 2005
    Date of Patent: July 20, 2010
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Erez Shaizaf, Kostya Korchomkin, Tal Mazor
  • Integrated Circuit and a Method For Designing a Boundary Scan Super-Cell
    Publication number: 20080204076
    Abstract: A method for designing an integrated circuit, the method includes: providing an initial definition of a boundary scan register that includes identical super-cells adapted to be connected to multiple pin types; and determining the configuration of each super-cell by providing at least one pin type indication signal to each super-cell. An integrated circuit that includes a boundary scan super-cell, the boundary scan super-cell includes first circuitry adapted to be connected to at least one type of integrated circuit pin; characterized by further including a second circuitry, connected to first circuitry, wherein the second circuitry is adapted to receive at least one pin type indication signal and in response allows the boundary scan super-cell to be connected to at least one additional type of an integrated circuit pin.
    Type: Application
    Filed: May 4, 2005
    Publication date: August 28, 2008
    Applicant: Freescale Semiconductor, Inc.
    Inventors: Erez Shaizaf, Kostya Korchomkin, Tal Mazor