Patents by Inventor Tam Minh Tran

Tam Minh Tran has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140200206
    Abstract: Provided herein are Pyrrolopyrimidine Compounds having the following structure: wherein R1, R2, R3, and L are as defined herein, compositions comprising an effective amount of a Pyrrolopyrimidine Compound, and methods for treating or preventing breast cancer, more particularly triple negative breast cancer, comprising administering an effective amount of such Pyrrolopyrimidine Compounds to a subject in need thereof.
    Type: Application
    Filed: January 15, 2014
    Publication date: July 17, 2014
    Applicant: Signal Pharmaceutical LLC
    Inventors: Andrew Antony Calabrese, Brandon Jeffy, Dale Robinson, Dan Zhu, Dehua Huang, Jan Elsner, John Boylan, Lida Tehrani, Mark A. Nagy, Mehran Fallah Moghaddam, Raj Kumar Raheja, Paul Erdman, Rama K. Narla, Roy L. Harris, Tam Minh Tran, Jennifer Riggs, Yuhong Ning
  • Publication number: 20090259641
    Abstract: An apparatus, system, and method are disclosed for optimization of XPath expressions in a database management system configured to accept XML queries. Operations of the method include receiving an XQuery representation and partitioning XPath expressions within the XQuery representation into a plurality of XPath expression clusters. The XPath expression clusters may comprise one or more XPath expressions and those in each cluster may operate on a common document. Furthermore, the XPath expressions in each cluster are hierarchically related to each other such that branch nodes of the cluster are executable independent of nodes in other XPath expression clusters. The method also defines merging the one or more XPath expressions into one or more expression trees for each XPath expression cluster. The method generates one or more query execution plans from the one or more XPath expression blocks.
    Type: Application
    Filed: April 10, 2008
    Publication date: October 15, 2009
    Applicant: International Business Machines Corporation
    Inventors: Andrey Balmin, Fatma Ozcan, Tam Minh Tran
  • Publication number: 20070027837
    Abstract: A method for consistent selectivity estimation based on the principle of maximum entropy (ME) is provided. The method efficiently exploits all available information and avoids the bias problem. In the absence of detailed knowledge, the ME approach reduces to standard uniformity and independence assumptions. The disclosed method, based on the principle of ME, is used to improve the optimizer's cardinality estimates by orders of magnitude, resulting in better plan quality and significantly reduced query execution times.
    Type: Application
    Filed: July 28, 2005
    Publication date: February 1, 2007
    Inventors: Marcel Kutsch, Volker Markl, Nimrod Megiddo, Tam Minh Tran
  • Patent number: 7152187
    Abstract: A low power E-fuse repair methodology substantially removes system latency during memory and/or E-fuse farm module power-down in a device that employs E-fuse farm technology. The method maintains power to the repair registers and minimal control logic in the memories, while all other circuitry can be either placed in a low power data retention mode, or completely powered off. There is no need to rescan the repair data from the E-fuse farm after one or more memories are powered back up. This provides dynamic power savings since there is no longer any need to idle the system to reload repair data. Since the E-fuse farm can be powered down after initial system power-up and repair data is loaded into the memories, there is also a significant leakage power savings.
    Type: Grant
    Filed: November 26, 2003
    Date of Patent: December 19, 2006
    Assignee: Texas Instruments Incorporated
    Inventors: Tam Minh Tran, George B. Jamison
  • Patent number: 6965261
    Abstract: An embodiment of a ultra low-power data retention latch circuit involves a slave latch SL that concurrently latches the same data that is loaded into a main circuit (such as a main latch ML) during normal operation. When the circuit enters a low power (data retention) mode, power (VCC) to the main latch ML is removed and the slave latch SL retains the most recent data (retained data SA, SA-). When power is being restored to the main latch ML, the slave latch's retained data SA, SA- is quickly restored to the main latch ML through what constitute Set and Reset inputs SAR, SAR- of the ML. This arrangement ensures that data restoration is much quicker than conventional arrangements that require the output data path DATA- to be stabilized before power is re-applied to the main latch. Further, there is no need to wait for power to the ML to be stable before restoring data from the SL to the ML, providing an increase in data restoration speed over conventional data retention latches.
    Type: Grant
    Filed: November 13, 2003
    Date of Patent: November 15, 2005
    Assignee: Texas Instruments Incorporated
    Inventors: Tam Minh Tran, George B. Jamison
  • Patent number: 6252814
    Abstract: Two separate dummy wordlines, a read dummy wordline and a write dummy wordline, are implemented within a memory array to provide for higher frequency operation of read and write cycles within the memory array. The two dummy wordlines are utilized to activate and deactivate the wordline enable signal for the read and write portions of an access. Such an access can be a read/swap cycle.
    Type: Grant
    Filed: April 29, 1999
    Date of Patent: June 26, 2001
    Assignee: International Business Machines Corp.
    Inventors: Tam Minh Tran, Scott A. Taylor