Patents by Inventor Tamaki Iwasaki

Tamaki Iwasaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160233686
    Abstract: A power management unit includes a part that transmits a first information data related to a first device for creating, consuming, or accumulating first energy and a second information data related to a second device for creating, consuming, or accumulating second energy to a server. The power management unit further includes a part that receives control data for controlling the first and second devices from the server, and a part that transmits the control data to the first device and the second device. Further, a power management method transmits the first information data and the second information data from the power management unit to the server. Furthermore, the power management method transmits control data for controlling the first device and the second device from the server to the power management unit, and transmits the control data from the power management unit to the first device and the second device.
    Type: Application
    Filed: September 22, 2014
    Publication date: August 11, 2016
    Inventors: JUNSHI YOSHIDA, TAKASHI NAKABAYASHI, KOICHI KUBOYA, YUJI OSUMI, HIROSHI SHIMOSATO, TAMAKI IWASAKI, SEIICHI UNO
  • Publication number: 20040255207
    Abstract: A microcomputer including a runaway detection control unit for monitoring a communication between external processing units that are provided outside the microcomputer, and a memory access control unit. When detecting that the communication between an external processing unit and the CPU gets into a runaway state while the CPU is performing a memory access to the external processing unit in a handshaking method, the runaway detection control unit outputs a pseudo acknowledge signal to the memory access control unit, in place of the normal acknowledge signal. When receiving the pseudo acknowledge signal via the memory access control unit, the CPU switches the memory access method for the external processing unit to the fixed waiting mode.
    Type: Application
    Filed: April 30, 2004
    Publication date: December 16, 2004
    Inventors: Kazuhiro Ika, Tamaki Iwasaki
  • Patent number: 6633502
    Abstract: A semiconductor device is provided with a memory, scan chains each comprising plural flip-flops, combination circuits which receive the outputs from the respective flip-flops in the scan chains, and a selector circuit which receives the outputs from the respective flip-flops and the outputs from the combinational circuits, selects test signals outputted from the flip-flops when the semiconductor device is in a test mode, and outputs the test signals to the memory, thereby to operate the memory. Therefore, stress can be reliably applied to the memory when a burn-in test is carried out.
    Type: Grant
    Filed: May 13, 2002
    Date of Patent: October 14, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Tamaki Iwasaki
  • Publication number: 20020167055
    Abstract: A semiconductor device is provided with a memory, scan chains each comprising plural flip-flops, combination circuits which receive the outputs from the respective flip-flops in the scan chains, and a selector circuit which receives the outputs from the respective flip-flops and the outputs from the combinational circuits, selects test signals outputted from the flip-flops when the semiconductor device is in a test mode, and outputs the test signals to the memory, thereby to operate the memory. Therefore, stress can be reliably applied to the memory when a burn-in test is carried out.
    Type: Application
    Filed: May 13, 2002
    Publication date: November 14, 2002
    Applicant: Matsushita Electric Industrial CO., LTD.
    Inventor: Tamaki Iwasaki