Abstract: Monopulse radar apparatus is disclosed. The apparatus comprises a digital processor and an antenna having a plurality of receive channels through which signals received by the antenna are passed to the processor. Each receive channel includes an analogue to digital converter, and the processor is arranged to calculate sum and difference signals from the signals received through each receive channel. The processor is also arranged such that, in the event that a malfunction is detected in one of the plurality of receive channels, compensated sum and difference signals are calculated by the processor using the signals from the remaining, functioning receive channels.

Abstract: Monopulse radar apparatus is disclosed. The apparatus comprises a digital processor and an antenna having a plurality of receive channels through which signals received by the antenna are passed to the processor. Each receive channel includes an analogue to digital converter, and the processor is arranged to calculate sum and difference signals from the signals received through each receive channel. The processor is also arranged such that, in the event that a malfunction is detected in one of the plurality of receive channels, compensated sum and difference signals are calculated by the processor using the signals from the remaining, functioning receive channels.