Patents by Inventor Tamer Mograbi

Tamer Mograbi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • System, method, and computer program product for grouping one or more failures in a formal verification
    Patent number: 10599797
    Abstract: The present disclosure relates to a method for use in a formal verification of an electronic design. Embodiments may include providing, using at least one processor, an electronic design and performing linting analysis using structural and formal methods of at least a portion of the electronic design. Embodiments may also include identifying a plurality of failures from the formal verification and identifying one or more of the plurality of failures as having a similar root cause. Embodiments may include grouping the one or more of the plurality of failures together, wherein grouping is based upon, at least in part, a check type.
    Type: Grant
    Filed: December 5, 2017
    Date of Patent: March 24, 2020
    Assignee: Cadence Design Systems, Inc.
    Inventors: Nizar Hanna, Kanwar Pal Singh, Maayan Ziv, Sudeep Kumar Srivastava, Tamer Mograbi, Sanaa Halloun