Abstract: A test instruction sequence generating method for a processor includes classifying registers used for executing test instructions into two register groups, generating a test instruction executed by the processor, amending a register specified in a result value register field of the test instruction to a register of a first register group when a first instruction is specified in an arithmetic type field of the test instruction and a register of a second register group is specified in the result value register field of the test instruction, and further amending a register specified in a input value register field of the test instruction to a register of the second register group when a second instruction is specified in the arithmetic type field of the test instruction and a register of the first register group is specified in the input value register field of the test instruction.

Abstract: A memory testing support method includes executing a procedure using a plurality of test patterns on a memory to be tested; recording an observation result of a current value flowing in the memory during the execution of the procedure using each of the test patterns into a storing section; and determining superiority or inferiority of the test patterns in terms of effectiveness of testing the memory based on the observation results of the test patterns recorded in the storing section.

Abstract: A method of testing a computer, the method has designating a register as an input-only register having a setting of a value which does not cause an exception interruption with an execution of a specific type of instruction, generating a test instruction array having a plurality of instructions for a test, by assigning a register excluding the input-only register as an output destination of an execution result of each of the plurality of instructions, executing the plurality of instructions included in the generated test instruction array, and evaluating the execution results by the computer.

Abstract: A method of testing a computer, the method has designating a register as an input-only register having a setting of a value which does not cause an exception interruption with an execution of a specific type of instruction, generating a test instruction array having a plurality of instructions for a test, by assigning a register excluding the input-only register as an output destination of an execution result of each of the plurality of instructions, executing the plurality of instructions included in the generated test instruction array, and evaluating the execution results by the computer.