Abstract: A wiring editing method for a semiconductor package of this invention includes the steps of assuming virtual circular arcs R1 to R4 in consideration of a clearance around a predetermined via 11a in a designated area on a virtual plane, drawing a regular polygon 12 circumscribing each of the virtual circular arcs R1 to R4, drawing a tangent from a via 11 crossed by one of the virtual circular arcs R1 to R4 to the crossing virtual circular arc and connecting to the regular polygon 12 circumscribing the crossing virtual circular arc to thereby form a wiring pattern 13 and moving or omitting redundant line segments forming the regular polygon 12 in the wiring pattern 13 to change a wiring route when an offset occurs in the wiring pattern 13 passing between the vias 11 inside the designated area.

Abstract: An automatic wiring method for a semiconductor package includes: a provisional wiring step for sequentially specifying a plurality of lines of the terminals from the innermost periphery to the outermost periphery of bonding pads, connecting the bonding pads to predetermined vias present on the specified line of the terminal with line segments, and provisionally determining a wiring route for each line of the terminal such that the line segment passes through between the vias in each line of the terminal at equal intervals; and a wiring formation step for forming the wiring based on a design rule such that the wiring pattern passes through between the lines of the terminals with uniform intervals between wires based on the provisionally wired wiring routes.

Abstract: A wiring editing method for a semiconductor package of this invention includes the steps of assuming virtual circular arcs R1 to R4 in consideration of a clearance round a predetermined via 11a in a designated area on a virtual plane, drawing a regular polygon 12 circumscribing the virtual circular arcs R1 to R4, drawing a tangent from a crossing via 11 to the virtual circular arcs R1 to R4 and connecting to the regular polygon 12 to thereby form a wiring pattern 13 when the virtual circular arcs R1 to R4 cross any of the vias 11, and moving or omitting the line segment forming the regular polygon 12 in the wiring pattern 13 to change a wiring route when an offset occurs in the wiring pattern 13 passing between the vias 11 inside the designated area.

Abstract: An automatic wiring method for a semiconductor package includes: a provisional wiring step for sequentially specifying a plurality of lines of the terminals from the innermost periphery to the outermost periphery of bonding pads, connecting the bonding pads to predetermined vias present on the specified line of the terminal with line segments, and provisionally determining a wiring route for each line of the terminal such that the line segment passes through between the vias in each line of the terminal at equal intervals; and a wiring formation step for forming the wiring based on a design rule such that the wiring pattern passes through between the lines of the terminals with uniform intervals between wires based on the provisionally wired wiring routes.