Patents by Inventor Tamotsu Morimoto

Tamotsu Morimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230150245
    Abstract: An anti-reflective film-attached transparent substrate includes: a transparent substrate including two main surfaces; and a diffusion layer and an anti-reflective film on one main surface of the transparent substrate, which are provided in this order. The anti-reflective film-attached transparent substrate satisfies (A) a luminous transmittance is 20% to 90%, (B) a transmission color b* value under a D65 light source is 5 or less, (C) a luminous reflectance (SCI Y) of an outermost layer of the anti-reflective film is 0.4% or less, (D) a sheet resistance of the anti-reflective film is 104 ?/square or more, (E) the anti-reflective film has a laminated structure in which at least two dielectric layers having different refractive indices are laminated, and (F) a Diffusion value is 0.2 or more and a diffused light brightness (SCE L*) is 4 or less.
    Type: Application
    Filed: January 20, 2023
    Publication date: May 18, 2023
    Applicant: AGC INC.
    Inventors: Kazuya TAKEMOTO, Tamotsu MORIMOTO, Aichi INOUE
  • Publication number: 20230144879
    Abstract: An anti-reflective film-attached transparent substrate includes a transparent substrate having two main surfaces and, on at least one of the main surfaces, a multilayer film in which at least two layers having different refractive indices are laminated. At least one silicon oxide layer among the layers in the multilayer film has a moisture permeability of 300 g/m2/day or less.
    Type: Application
    Filed: December 28, 2022
    Publication date: May 11, 2023
    Applicant: AGC Inc.
    Inventors: Katsumi SUZUKI, Kazuya TAKEMOTO, Tamotsu MORIMOTO
  • Patent number: 10910229
    Abstract: A method capable of increasing a degree of freedom of process conditions that can be set in a plasma treatment while limiting deterioration in the electrical characteristics of a silicon or metal oxide film exposed to plasma, in performing the plasma treatment on a substrate. The method includes: processing a substrate on which a silicon or metal oxide film is formed, with plasma obtained by plasmarizing a process gas composed of a halogen compound; and subsequently, heating the substrate at a temperature of 450 degrees C. or higher in an inert gas atmosphere or a vacuum atmosphere in a state where the metal oxide film exposed to the plasma is exposed. Thus, deterioration in the characteristics of the oxide film caused by the plasma treatment are restored.
    Type: Grant
    Filed: November 21, 2016
    Date of Patent: February 2, 2021
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Koichi Nagakura, Tamotsu Morimoto, Shuichiro Uda, Takeshi Saito
  • Patent number: 10790152
    Abstract: In a method for etching a multilayer film of a target object by using a plasma processing apparatus, the multilayer film of the target object includes a layer made of a metal magnetic material and a mask is provided on the multilayer film. The multilayer film is etched in a state where a pressure in a processing chamber of the plasma processing apparatus is set to a first pressure that is a relatively high pressure. Subsequently, the multilayer film is further etched in a state where the pressure in the processing chamber is set to a second pressure lower than the first pressure.
    Type: Grant
    Filed: July 15, 2016
    Date of Patent: September 29, 2020
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Takuya Kubo, Song yun Kang, Tamotsu Morimoto
  • Publication number: 20200142105
    Abstract: A front plate for a display apparatus includes a support body that is transparent and that has a first surface and a second surface, a low reflective layer disposed on a same side as the first surface of the support body, and an antiglare layer disposed on a same side as the second surface of the support body, wherein the antiglare layer includes particles having an average diameter of 1 ?m to 10 ?m dispersed in a resin matrix.
    Type: Application
    Filed: January 2, 2020
    Publication date: May 7, 2020
    Applicant: AGC Inc.
    Inventors: Kazuhiko MITARAI, Tamotsu MORIMOTO, Yasuhisa NISHIKAWA
  • Publication number: 20180366334
    Abstract: A method capable of increasing a degree of freedom of process conditions that can be set in a plasma treatment while limiting deterioration in the electrical characteristics of a silicon or metal oxide film exposed to plasma, in performing the plasma treatment on a substrate. The method includes: processing a substrate on which a silicon or metal oxide film is formed, with plasma obtained by plasmarizing a process gas composed of a halogen compound; and subsequently, heating the substrate at a temperature of 450 degrees C. or higher in an inert gas atmosphere or a vacuum atmosphere in a state where the metal oxide film exposed to the plasma is exposed. Thus, deterioration in the characteristics of the oxide film caused by the plasma treatment are restored.
    Type: Application
    Filed: November 21, 2016
    Publication date: December 20, 2018
    Inventors: Koichi NAGAKURA, Tamotsu MORIMOTO, Shuichiro UDA, Takeshi SAITO
  • Publication number: 20180190500
    Abstract: In a method for etching a multilayer film of a target object by using a plasma processing apparatus, the multilayer film of the target object includes a layer made of a metal magnetic material and a mask is provided on the multilayer film. The multilayer film is etched in a state where a pressure in a processing chamber of the plasma processing apparatus is set to a first pressure that is a relatively high pressure. Subsequently, the multilayer film is further etched in a state where the pressure in the processing chamber is set to a second pressure lower than the first pressure.
    Type: Application
    Filed: July 15, 2016
    Publication date: July 5, 2018
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Takuya KUBO, Song yun KANG, Tamotsu MORIMOTO
  • Patent number: 9947864
    Abstract: In one embodiment, a method for etching a workpiece including a lower electrode and a multi-layer film disposed on the lower electrode, the multi-layer film including a first magnetic layer, a second magnetic layer, and an insulating layer interposed between the first magnetic layer and the second magnetic layer, through a mask, is provided. The method includes exposing the workpiece to plasma of first processing gas which contains first rare gas and second rare gas having an atomic number larger than that of the first rare gas, and does not contain hydrogen gas.
    Type: Grant
    Filed: August 6, 2015
    Date of Patent: April 17, 2018
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Tamotsu Morimoto, Song yun Kang
  • Patent number: 9911596
    Abstract: A modification processing method includes preparing a substrate having a silicon layer on which a damage layer is formed through plasma processing. The method further includes removing the damage layer formed on the silicon layer by processing the substrate with a first process gas containing a fluorine gas.
    Type: Grant
    Filed: August 9, 2016
    Date of Patent: March 6, 2018
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Tamotsu Morimoto, Yusuke Muraki, Kazuaki Nishimura
  • Publication number: 20180047787
    Abstract: A nonvolatile storage device includes: first wirings arranged in first and second directions that intersect each other, and extending in a third direction perpendicular to the first and second directions; second wirings extending in the first direction, and each of the second wiring installed at a predetermined interval from each other in the third direction; first layers disposed between the first wirings and the second wirings, and extending in the third direction along the plurality of first wirings; and memory cells installed between the first layers and the second wirings and at respective positions where the first layers and the second wirings intersect each other. Each memory cell includes a second layer disposed towards a side closer to the second wirings and a conductive intermediate layer disposed towards a side closer to the first layers.
    Type: Application
    Filed: August 7, 2017
    Publication date: February 15, 2018
    Inventors: Genji NAKAMURA, Tamotsu MORIMOTO
  • Publication number: 20170200886
    Abstract: In one embodiment, a method for etching a workpiece including a lower electrode and a multi-layer film disposed on the lower electrode, the multi-layer film including a first magnetic layer, a second magnetic layer, and an insulating layer interposed between the first magnetic layer and the second magnetic layer, through a mask, is provided. The method includes exposing the workpiece to plasma of first processing gas which contains first rare gas and second rare gas having an atomic number larger than that of the first rare gas, and does not contain hydrogen gas.
    Type: Application
    Filed: August 6, 2015
    Publication date: July 13, 2017
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Tamotsu MORIMOTO, Song yun KANG
  • Publication number: 20160351390
    Abstract: A modification processing method includes preparing a substrate having a silicon layer on which a damage layer is formed through plasma processing. The method further includes removing the damage layer formed on the silicon layer by processing the substrate with a first process gas containing a fluorine gas.
    Type: Application
    Filed: August 9, 2016
    Publication date: December 1, 2016
    Inventors: Tamotsu MORIMOTO, Yusuke MURAKI, Kazuaki NISHIMURA
  • Patent number: 9443724
    Abstract: A modification processing method includes preparing a substrate having a silicon layer on which a damage layer is formed through plasma processing. The method further includes removing the damage layer formed on the silicon layer by processing the substrate with a first process gas containing a fluorine gas.
    Type: Grant
    Filed: May 29, 2015
    Date of Patent: September 13, 2016
    Assignee: Tokyo Electron Limited
    Inventors: Tamotsu Morimoto, Yusuke Muraki, Kazuaki Nishimura
  • Publication number: 20150357187
    Abstract: A modification processing method includes preparing a substrate having a silicon layer on which a damage layer is formed through plasma processing. The method further includes removing the damage layer formed on the silicon layer by processing the substrate with a first process gas containing a fluorine gas.
    Type: Application
    Filed: May 29, 2015
    Publication date: December 10, 2015
    Inventors: Tamotsu MORIMOTO, Yusuke MURAKI, Kazuaki NISHIMURA
  • Patent number: 9025248
    Abstract: An antireflection stack, whereby a reflected color is moderate, and a multicolorization is suppressed. The antireflection stack comprises a substrate and an antireflection layer stacked on the substrate. The antireflection layer has a four-layer structure and comprises, sequentially from the substrate side, a first layer, a second layer, a third layer and a fourth layer. Further, the first layer has a refractive index of from 1.7 to 1.79, the second layer has a refractive index of from 2.25 to 2.45, the third layer has a refractive index of from 2.1 to 2.3, the fourth layer has a refractive index of from 1.25 to 1.5, and the refractive index of the second layer is larger than that of the third layer.
    Type: Grant
    Filed: October 28, 2013
    Date of Patent: May 5, 2015
    Assignee: Asahi Glass Company, Limited
    Inventors: Kensuke Fujii, Kouji Satou, Kouta Hori, Tamotsu Morimoto
  • Publication number: 20150030761
    Abstract: To provide an apparatus and process capable of continuously forming a fluorinated organosilicon compound thin film having high durability while a substrate is transported.
    Type: Application
    Filed: August 22, 2014
    Publication date: January 29, 2015
    Applicant: ASAHI GLASS COMPANY, LIMITED
    Inventors: Ryosuke KATO, Masao Miyamura, Tamotsu Morimoto
  • Publication number: 20140057051
    Abstract: To provide a process and apparatus whereby a fluorinated organosilicon compound thin film having high durability can be produced, and a film formation step can be carried out continuously. A process for producing a fluorinated organosilicon compound thin film, which comprises the following steps (a) to (c) sequentially in this order, and an apparatus useful for the process: (a) a heating step of heating a fluorinated organosilicon compound in a heating container to a vapor deposition initiation temperature, (b) a pretreatment step of discharging a vapor from the fluorinated organosilicon compound after reaching the vapor deposition initiation temperature, and (c) a deposition step of forming a fluorinated organosilicon compound thin film by supplying a vapor of the fluorinated organosilicon compound after the pretreatment step on a substrate in a vacuum chamber.
    Type: Application
    Filed: October 30, 2013
    Publication date: February 27, 2014
    Applicant: Asahi Glass Company, Limited
    Inventors: Ryosuke KATO, Masao Miyamura, Tamotsu Morimoto
  • Publication number: 20140049827
    Abstract: To provide an antireflection stack, whereby a reflected color is moderate, and a multicolorization is suppressed. The antireflection stack 1 comprises a substrate 2 and an antireflection layer 3 stacked on the substrate 2. The antireflection layer 3 has a four-layer structure and comprises, sequentially from the substrate side, a first layer 31, a second layer 32, a third layer 33 and a fourth layer 34. Further, the first layer 31 has a refractive index of from 1.6 to 1.9, the second layer 32 has a refractive index of from 2.2 to 2.5, the third layer 33 has a refractive index of from 2.0 to 2.3, the fourth layer 34 has a refractive index of from 1.2 to 1.5, and the refractive index of the second layer 32 is larger than that of the third layer 33.
    Type: Application
    Filed: October 28, 2013
    Publication date: February 20, 2014
    Applicant: ASAHI GLASS COMPANY, LIMITED
    Inventors: Kensuke FUJII, Kouji SATOU, Kouta HORI, Tamotsu MORIMOTO
  • Patent number: 8574446
    Abstract: At the time of plasma igniting or during plasma processing, only optimizing the distance between electrodes in each case caused a limitation to the prevention of charging damage. To resolve this, a novel plasma processing method employs a plasma processing apparatus which includes an upper electrode to which first high-frequency power is applied, a lower electrode to which second high-frequency power is applied, and a lift mechanism for controlling the spacing between the upper and lower electrodes. The first high-frequency power is applied to the upper electrode to cause plasma igniting. The method is adapted to make the spacing between the upper and lower electrodes larger at least at the time of plasma extinction than during plasma processing of a wafer on the lower electrode.
    Type: Grant
    Filed: August 5, 2009
    Date of Patent: November 5, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Tamotsu Morimoto, Takahiro Murakami
  • Publication number: 20120250146
    Abstract: The present invention relates to a laminated glass including: a pair of glass substrates facing with each other; a composite film arranged between the pair of glass substrates and including a resin film and an infrared reflective film which includes a high refractive index layer and a low refractive index layer and is formed on a light-incident-side main surface of the resin film; and a pair of adhesive sheets arranged between the pair of glass substrates and the composite film to bond the pair of glass substrates and the composite film, in which the laminated glass has the specific configuration.
    Type: Application
    Filed: June 18, 2012
    Publication date: October 4, 2012
    Applicant: ASAHI GLASS COMPANY, LIMITED
    Inventors: Kazuhiro Tamai, Yuichi Hino, Tamotsu Morimoto, Takeomi Miyako, Koji Sasaki