Patents by Inventor Tamotsu Watarai

Tamotsu Watarai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Wiring placement method of wirings having different length and semiconductor integrated circuit device
    Publication number: 20120047726
    Abstract: A wiring placement method of placing a plurality of wirings of different lengths in parallel on a plane includes placing a longest wiring and a shortest wiring alongside each other among the plurality of wirings (a) placing a longest wiring from among remaining wires which have not been placed yet, alongside an outside of a space surrounded by the wirings already placed and on a side of a shorter wiring of the wrings placed at outermost ends, (b) placing a shortest wiring from among remaining wires which have not placed yet, alongside an outside of a space surrounded by the wirings already placed and on a side of a longer wiring of the wirings placed at outermost ends, and alternately repeating (a) and (b) to place the plurality of wirings.
    Type: Application
    Filed: November 2, 2011
    Publication date: March 1, 2012
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventor: Tamotsu WATARAI
  • Wiring placement method of wirings having different length and semiconductor integrated circuit device
    Patent number: 8080883
    Abstract: A longest wiring and a shortest wiring alongside each other among the plurality of wirings are placed. Then, a longest wiring from among remaining wires which have not being placed yet, alongside an outside of a space surrounded by the wirings already placed and on a side of a shorter wiring of the wrings placed at outermost ends are placed. A shortest wiring from among remaining wires which have not placed yet, alongside an outside of a space surrounded by the wirings already placed and on a side of a longer wiring of the wirings placed at outermost ends is placed. These two processes are repeated.
    Type: Grant
    Filed: February 4, 2009
    Date of Patent: December 20, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Tamotsu Watarai
  • Wiring placement method of wirings having different length and semiconductor integrated circuit device
    Publication number: 20090207581
    Abstract: A longest wiring and a shortest wiring alongside each other among the plurality of wirings are placed. Then, a longest wiring from among remaining wires which have not being placed yet, alongside an outside of a space surrounded by the wirings already placed and on a side of a shorter wiring of the wrings placed at outermost ends are placed. A shortest wiring from among remaining wires which have not placed yet, alongside an outside of a space surrounded by the wirings already placed and on a side of a longer wiring of the wirings placed at outermost ends is placed. These two processes are repeated.
    Type: Application
    Filed: February 4, 2009
    Publication date: August 20, 2009
    Applicant: NEC Electronics Corporation
    Inventor: Tamotsu Watarai