Patents by Inventor Tan Q. Thai

Tan Q. Thai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10254334
    Abstract: Described herein are various technologies pertaining to identifying counterfeit integrated circuits (ICs) by way of allowing the origin of fabrication to be verified. An IC comprises a main circuit and a test circuit that is independent of the main circuit. The test circuit comprises at least one ring oscillator (RO) signal that, when energized, is configured to output a signal that is indicative of a semiconductor fabrication facility where the IC was manufactured.
    Type: Grant
    Filed: July 24, 2018
    Date of Patent: April 9, 2019
    Assignee: National Technology & Engineering Solutions of Sandia, LLC
    Inventors: Ryan Helinski, Lyndon G. Pierson, Edward I. Cole, Tan Q. Thai
  • Publication number: 20180328984
    Abstract: Described herein are various technologies pertaining to identifying counterfeit integrated circuits (ICs) by way of allowing the origin of fabrication to be verified. An IC comprises a main circuit and a test circuit that is independent of the main circuit. The test circuit comprises at least one ring oscillator (RO) signal that, when energized, is configured to output a signal that is indicative of a semiconductor fabrication facility where the IC was manufactured.
    Type: Application
    Filed: July 24, 2018
    Publication date: November 15, 2018
    Inventors: Ryan Helinski, Lyndon G. Pierson, Edward I. Cole, Tan Q. Thai
  • Patent number: 10060973
    Abstract: Described herein are various technologies pertaining to identifying counterfeit integrated circuits (ICs) by way of allowing the origin of fabrication to be verified. An IC comprises a main circuit and a test circuit that is independent of the main circuit. The test circuit comprises at least one ring oscillator (RO) signal that, when energized, is configured to output a signal that is indicative of a semiconductor fabrication facility where the IC was manufactured.
    Type: Grant
    Filed: May 22, 2015
    Date of Patent: August 28, 2018
    Assignee: National Technology & Engineering Solutions of Sandia, LLC
    Inventors: Ryan Helinski, Lyndon G. Pierson, Jr., Edward I. Cole, Jr., Tan Q. Thai
  • Patent number: 9628339
    Abstract: Embodiments of network testbed creation and validation processes are described herein. A “network testbed” is a replicated environment used to validate a target network or an aspect of its design. Embodiments describe a network testbed that comprises virtual testbed nodes executed via a plurality of physical infrastructure nodes. The virtual testbed nodes utilize these hardware resources as a network “fabric,” thereby enabling rapid configuration and reconfiguration of the virtual testbed nodes without requiring reconfiguration of the physical infrastructure nodes. Thus, in contrast to prior art solutions which require a tester manually build an emulated environment of physically connected network devices, embodiments receive or derive a target network description and build out a replica of this description using virtual testbed nodes executed via the physical infrastructure nodes. This process allows for the creation of very large (e.g.
    Type: Grant
    Filed: November 22, 2016
    Date of Patent: April 18, 2017
    Assignee: Sandia Corporation
    Inventors: Tan Q. Thai, Vincent Urias, Brian P. Van Leeuwen, Kristopher K. Watts, Andrew John Sweeney
  • Patent number: 9600386
    Abstract: Embodiments of network testbed creation and validation processes are described herein. A “network testbed” is a replicated environment used to validate a target network or an aspect of its design. Embodiments describe a network testbed that comprises virtual testbed nodes executed via a plurality of physical infrastructure nodes. The virtual testbed nodes utilize these hardware resources as a network “fabric,” thereby enabling rapid configuration and reconfiguration of the virtual testbed nodes without requiring reconfiguration of the physical infrastructure nodes. Thus, in contrast to prior art solutions which require a tester manually build an emulated environment of physically connected network devices, embodiments receive or derive a target network description and build out a replica of this description using virtual testbed nodes executed via the physical infrastructure nodes. This process allows for the creation of very large (e.g.
    Type: Grant
    Filed: May 29, 2014
    Date of Patent: March 21, 2017
    Assignee: Sandia Corporation
    Inventors: Tan Q. Thai, Vincent Urias, Brian P. Van Leeuwen, Kristopher K. Watts, Andrew John Sweeney