Patents by Inventor Tan Watanabe

Tan Watanabe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040154007
    Abstract: A translator system for translating source programs into machine language programs in an electronic computer system. An object program common to a plurality of different machine types of computers are generated while implementing execution performance equivalent to object programs inherent to the computers. A compiler translates a source program into an abstract object program including an abstract machine instruction sequence and indication concerning allocation of abstract registers. An installer converts the abstract object program into a machine language program of target computer on the basis of executable computer specification information including register usage indication and machine instruction selecting rules.
    Type: Application
    Filed: January 23, 2004
    Publication date: August 5, 2004
    Inventors: Shinobu Koizumi, Ichiro Kyushima, Tan Watanabe, Toshiaki Kohno, Singi Domen
  • Publication number: 20020026633
    Abstract: A translator system for translating source programs into machine language programs in an electronic computer system. An object program common to a plurality of different machine types of computers are generated while implementing execution performance equivalent to object programs inherent to the computers. A compiler translates a source program into an abstract object program including an abstract machine instruction sequence and indication concerning allocation of abstract registers. An installer converts the abstract object program into a machine language program of target computer on the basis of executable computer specification information including register usage indication and machine instruction selecting rules.
    Type: Application
    Filed: May 18, 1998
    Publication date: February 28, 2002
    Inventors: SHINOBU KOIZUMI, ICHIRO KYUSHIMA, TAN WATANABE, TOSHIAKI KOHNO, SINGI DOMEN
  • Patent number: 6343373
    Abstract: A translator system for translating source programs into machine language programs in an electronic computer system. An object program common to a plurality of different machine types of computers are generated while implementing execution performance equivalent to object programs inherent to the computers. A compiler translates a source program into an abstract object program including an abstract machine instruction sequence and indication concerning allocation of abstract registers. An installer converts the abstract object program into a machine language program of target computer on the basis of executable computer specification information including register usage indication and machine instruction selecting rules.
    Type: Grant
    Filed: December 30, 1998
    Date of Patent: January 29, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Shinobu Koizumi, Ichiro Kyushima, Tan Watanabe, Toshiaki Kohno, Singi Domen
  • Patent number: 5586323
    Abstract: A translator system for translating source programs into machine language programs in an electronic computer system. An object program common to a plurality of different machine types of computers are generated while implementing execution performance equivalent to object programs inherent to the computers. A compiler translates a source program into an abstract object program including an abstract machine instruction sequence and indication concerning allocation of abstract registers. An installer converts the abstract object program into a machine language program of target computer on the basis of executable computer specification information including register usage indication and machine instruction selecting rules.
    Type: Grant
    Filed: April 23, 1992
    Date of Patent: December 17, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Shinobu Koizumi, Ichiro Kyushima, Tan Watanabe, Toshiaki Kohno, Singi Domen
  • Patent number: 5564031
    Abstract: In a digital computer, a circular queue of registers in a register file are allocated as temporary local storage for procedures rather than using the known caller/callee save convention in order to minimize main memory references. A called procedure dynamically allocates local registers as needed without regard to registers used by the caller of the procedure or by any callee of the procedure, whereby register allocation is not restricted by any predetermined window size. Local registers, including parameter passing registers, are allocated in the called procedure, rather than a priori at compile time, by adjusting register stack pointer values. Only the number of registers actually required by the procedure need by allocated. Optionally, rotating registers may be allocated among the local registers. Stack pointer values are stored in one of the parameter passing registers when a procedure is called.
    Type: Grant
    Filed: April 12, 1996
    Date of Patent: October 8, 1996
    Assignees: Hewlett-Packard Company, Hitachi, Ltd.
    Inventors: Frederic C. Amerson, Robert M. English, Rajiv Gupta, Tan Watanabe
  • Patent number: 5517664
    Abstract: In a computer system equipped with a large number of registers which have an access time much shorter than that of a main memory, a register designating address part in which the assignment of an area register having a register address of a register area as its value and the assignment of a register displacement value expressing a relative register address within the register area are combined is provided in each instruction so that, even when physical registers are increased, save and restore of registers attendant upon task switches, etc. may be lessened to attain a raised speed of program run processing.Besides, an address part for designating the main memory is provided in the same instruction.
    Type: Grant
    Filed: June 2, 1995
    Date of Patent: May 14, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Tan Watanabe, Keiichi Kurakazu, Yugo Kashiwagi, Keisuke Toyama, Tohru Nojiri
  • Patent number: 5450610
    Abstract: In a computer system equipped with a large number of registers which have an access time much shorter than that of a main memory, a register designating address part in which the assignment of an area register having a register address of a register area as its value and the assignment of a register displacement value expressing a relative register address within the register area are combined is provided in each instruction so that, even when physical registers are increased, save and restore of registers attendant upon task switches, etc. may be lessened to attain a raised speed of program run processing. Besides, an address part for designating the main memory is provided in the same instruction.
    Type: Grant
    Filed: January 21, 1994
    Date of Patent: September 12, 1995
    Assignee: Hitachi, Ltd.
    Inventors: Tan Watanabe, Keiichi Kurakazu, Yugo Kashiwagi, Keisuke Toyama, Thoru Nojiri
  • Patent number: 5307502
    Abstract: In a computer system equipped with a large number of registers which have an access time much shorter than that of a main memory, a register designating address part in which the assignment of an area register having a register address of a register area as its value and the assignment of a register displacement value expressing a relative register address within the register area are combined is provided in each instruction so that, even when physical registers are increased, save and restore of registers attendant upon task switches, etc. may be lessened to attain a raised speed of program run processing. Besides, an address part for designating main memory is provided in the same instruction.
    Type: Grant
    Filed: September 17, 1992
    Date of Patent: April 26, 1994
    Assignee: Hitachi, Ltd.
    Inventors: Tan Watanabe, Keiichi Kurakazu, Yugo Kashiwagi, Keisuke Toyama, Tohru Nojiri
  • Patent number: 5293594
    Abstract: In order to divide a memory addressed unidimensionally into a plurality of memory areas and to manage efficiently these memory areas, the address to be accessed inside the memory is determined on a software basis by a computer instruction by use of the value of a first pointer designating each memory area and the value of a second pointer designating the relative address in the designated memory area.
    Type: Grant
    Filed: April 3, 1990
    Date of Patent: March 8, 1994
    Assignee: Hitachi, Ltd.
    Inventors: Tohru Nojiri, Shunpei Kawasaki, Tan Watanabe, Kousuke Sakoda
  • Patent number: 5214786
    Abstract: In a computer system equipped with a large number of registers which have an access time much shorter than that of a main memory, a register designating address part in which the assignment of an area register having a register address of a register area as its value and the assignment of a register displacement value expressing a relative register address within the register area are combined is provided in each instruction so that, even when physical registers are increased, save and restore of registers attendant upon task switches, etc. may be lessened to attain a raised speed of program run processing.Besides, an address part for designating the main memory is provided in the same instruction.
    Type: Grant
    Filed: April 13, 1987
    Date of Patent: May 25, 1993
    Assignee: Hitachi, Ltd.
    Inventors: Tan Watanabe, Keiichi Kurakazu, Yugo Kashiwagi, Keisuke Toyama, Thoru Nojiri
  • Patent number: 5068804
    Abstract: An input method and an input apparatus wherein a sketch read by an image scanner is displayed on the display, the class of component figure is designated thereon, characteristic values are input, and positions of characteristic points are designated such that a figure of fair copy is automatically prepared. Further, the sketch and the figure of fair copy are displayed being superposed upon each other while modifying the brightness or color so that the results of input can be easily recognized, making it possible to reduce the work for inputting the figure and to easily determine the size and position of the figure on the document which is a constituent component. In preparing the figure of fair copy by recognizing through a pattern recognition device the sketch that is input by the image scanner, furthermore, those portions that were not properly recognized are input again by the above method and apparatus.
    Type: Grant
    Filed: May 7, 1990
    Date of Patent: November 26, 1991
    Assignee: Hitachi, Ltd.
    Inventors: Tan Watanabe, Hideki Nishino, Hidefumi Iwami, Kuniaki Tabata