Abstract: Various embodiments of the present invention relate to a point-of-sale (POS) system, and more particularly, to systems, devices and methods of making secure payments using a mobile device in addition to a POS terminal that may be an insecure payment device exposed to various tamper attempts under certain circumstances. The mobile device is involved in a trusted transaction between a central financial entity, e.g., a bank, and the payment terminal, such that the insecure payment terminal may be further authenticated based on rolling codes, two-way or three-way authentication, or an off-line mode enabled by incorporation of the mobile device. Although either of the mobile device and the payment terminal provides limited security, a POS system incorporating both of them demonstrates an enhanced level of security.

Abstract: Presented are systems and methods that allow hardware designers to protect valuable IP and information in the hardware domain in order to increase overall system security. In various embodiments of the invention this is accomplished by configuring logic gates of existing logic circuitry based on a key input. In certain embodiments, a logic function provides results that are dependent not only on input values but also on an encrypted logic key that determines connections for a given logic building block, such that the functionality of the logic function cannot be determined by reverse engineering. In some embodiments, the logic key is created by decrypting a piece of data using a secret or private key. Advantages of automatic encryption include that existing circuitry need not be re-implemented or re-built, and that the systems and methods presented are backward compatible with standard manufacturing tools.

Abstract: A microcontroller includes a program memory, data memory, central processing unit, at least one register module, a memory management unit, and a transport network. Instructions are executed in one clock cycle via an instruction word. The instruction word indicates the source module from which data is to be retrieved and the destination module to which data is to be stored. The address/data capability of an instruction word may be extended via a prefix module. If an operation is performed on the data, the source module or the destination module may perform the operation during the same clock cycle in which the data is transferred.

Abstract: Various embodiments of the invention allow to dynamically transition between clock-driven and even-driven circuit elements to enable automatic multi-mode operation to enable low-power and high-throughput applications. In certain embodiments, dynamic transitioning is accomplished through a mode control unit that evaluates input data from a number of sources to determine whether to initiate a transition. Certain embodiments take advantage of dynamic transitioning to allow for energy harvesting in a data gathering phase by switching to high power communication phase as needed. The energy harvesting scheme is particularly suited for battery-operated applications that benefit from a reduction in overall power consumption.

Abstract: A secure logic system includes a physically unclonable function, a physically unclonable function configuration register, and an encryption circuit. The physically unclonable function establishes an encryption string according to at least partial random physical characteristics of the physically unclonable function. The physically unclonable function configuration register is coupled to the physically unclonable function, and load the encryption string from the physically unclonable function. The encryption circuit is coupled to the physically unclonable function configuration register, and manipulates a system string with the encryption string to generate encrypted data.

Abstract: A self-tracked bistable latch cell includes a cross-coupled latch, and two programmable transistors. The cross-coupled latch has a first data terminal, a second data terminal, a first voltage input terminal for receiving a latch control signal, and a second voltage input terminal for receiving a reference voltage. The first programmable transistor has a first terminal for outputting a first bit, a second terminal coupled to the first data terminal of the cross-coupled latch, and a control terminal for receiving a track control signal. The second programmable transistor has a first terminal for outputting a second bit, a second terminal coupled to the second data terminal of the cross-coupled latch, and a control terminal for receiving the track control signal. The gate oxide of both the first and the second programmable transistor are thinner than the gate oxide of the transistor of the cross-coupled latch.

Abstract: Presented are systems and methods that allow hardware designers to protect valuable IP and information in the hardware domain in order to increase overall system security. In various embodiments of the invention this is accomplished by configuring logic gates of existing logic circuitry based on a key input. In certain embodiments, a logic function provides results that are dependent not only on input values but also on an encrypted logic key that determines connections for a given logic building block, such that the functionality of the logic function cannot be determined by reverse engineering. In some embodiments, the logic key is created by decrypting a piece of data using a secret or private key. Advantages of automatic encryption include that existing circuitry need not be re-implemented or re-built, and that the systems and methods presented are backward compatible with standard manufacturing tools.

Abstract: Various embodiments of the present invention relate to a point-of-sale (POS) system, and more particularly, to systems, devices and methods of making secure payments using a mobile device in addition to a POS terminal that may be an insecure payment device exposed to various tamper attempts under certain circumstances. The mobile device is involved in a trusted transaction between a central financial entity, e.g., a bank, and the payment terminal, such that the insecure payment terminal may be further authenticated based on rolling codes, two-way or three-way authentication, or an off-line mode enabled by incorporation of the mobile device. Although either of the mobile device and the payment terminal provides limited security, a POS system incorporating both of them demonstrates an enhanced level of security.

Abstract: Various embodiments of the present invention relate to a point-of-sale (POS) system, and more particularly, to systems, devices and methods of making secure payments using a mobile device in addition to a POS terminal that may be an insecure payment device exposed to various tamper attempts under certain circumstances. The mobile device is involved in a trusted transaction between a central financial entity, e.g., a bank, and the payment terminal, such that the insecure payment terminal may be further authenticated based on rolling codes, two-way or three-way authentication, or an off-line mode enabled by incorporation of the mobile device. Although either of the mobile device and the payment terminal provides limited security, a POS system incorporating both of them demonstrates an enhanced level of security.

Abstract: Presented are systems and methods that allow hardware designers to protect valuable IP and information in the hardware domain in order to increase overall system security. In various embodiments of the invention this is accomplished by configuring logic gates of existing logic circuitry based on a key input. In certain embodiments, a logic function provides results that are dependent not only on input values but also on an encrypted logic key that determines connections for a given logic building block, such that the functionality of the logic function cannot be determined by reverse engineering. In some embodiments, the logic key is created by decrypting a piece of data using a secret or private key. Advantages of automatic encryption include that existing circuitry need not be re-implemented or re-built, and that the systems and methods presented are backward compatible with standard manufacturing tools.

Abstract: The invention relates to authentication in mobile financial transactions, and more particularly, to systems, devices and methods of employing a location tracking function within a mobile device for the purpose of authenticating a user and a trusted transaction when this mobile device is configured to a mobile point-of-sale (POS) terminal. Authentication is primarily implemented by a secure element integrated within the mobile device based on comparison between captured geo-location data and some known information, such as a retailer address, this user's behavior pattern and shopping habit, that may be derived from the geo-location data. In the secure element, a secure memory stores a plurality of geo-location data from which a secure processor generates information concerning a behavior pattern or a shopping habit of the user. A V/A unit receives a real-time geo-location of the mobile device, and thereby, verifies the user or the trusted transaction according to the generated information.

Abstract: Presented are systems and methods that allow hardware designers to protect valuable IP and information in the hardware domain in order to increase overall system security. In various embodiments of the invention this is accomplished by configuring logic gates of existing logic circuitry based on a key input. In certain embodiments, a logic function provides results that are dependent not only on input values but also on an encrypted logic key that determines connections for a given logic building block, such that the functionality of the logic function cannot be determined by reverse engineering. In some embodiments, the logic key is created by decrypting a piece of data using a secret decryption key. Advantages of automatic encryption include that existing circuitry need not be re-implemented or re-built, and that the systems and methods presented are backward compatible with standard manufacturing tools.

Abstract: Various embodiments of the invention allow to protect data in a logic circuit from being detected by commonly known observation methods. In certain embodiments, this is accomplished by selecting a set of reconfigurable logic blocks within the logic circuit to form a routing path in such a manner that the circuit performs a given function while making it virtually impossible to follow data through the circuit as the data is being processed. The routing path may be selected in a random or pseudorandom fashion, for example, in response to detecting an environmental change. In some embodiments, known data is injected into the logic path and the output is compared to a known value. If the result is incorrect, for example, because a section of the hardware ceased to properly perform due to a faulty circuit component, signals are routed through an operational part of the circuit to provide a different and valid logic path, while avoiding faulty logic gates.

Abstract: A microcontroller includes a program memory, data memory, central processing unit, at least one register module, a memory management unit, and a transport network. Instructions are executed in one clock cycle via an instruction word. The instruction word indicates the source module from which data is to be retrieved and the destination module to which data is to be stored. The address/data capability of an instruction word may be extended via a prefix module. If an operation is performed on the data, the source module or the destination module may perform the operation during the same clock cycle in which the data is transferred.

Abstract: Various embodiments of the invention allow to effectively reduce device and system power consumption in both active and inactive modes without compromising performance, without large area overhead, and at low cost. In certain embodiments, the reduction of power consumption is accomplished by combining circuit control techniques with power gating methods to reduce power loss due to leakage current.

Abstract: Various embodiments of the invention relate to secure systems and modules, and more particularly, to systems, devices and methods of generating and applying identification elements uniquely associated with memory, memory mapping and encrypted storage. These unique identification elements provide an improved, statistically random source from which keys and memory mappings may be derived. The application of these keys across various architectures result in an improvement in the security of data stored within a system.

Abstract: The invention relates to systems having linear regulators and methods of operating the systems. The system includes: a linear regulator responsive to an input voltage and operative to output a regulated voltage; a first circuit responsive to the regulated voltage and configured to operate at a first voltage difference between the regulated voltage and a ground level; and a second circuit responsive to the input voltage and the regulated voltage and configured to operate at a second voltage difference between the input voltage and the regulated voltage. The second circuit is coupled to the first circuit so that an entire portion of a current flowing through the second circuit is configured to enter into the first circuit during operation, wherein the current flowing through the second circuit bypasses the linear regulator.

Abstract: The invention relates to semiconductor devices, and more particularly, to systems, devices and methods of utilizing inherent differences among physical elements in an electrical component to generate unique and non-duplicable numbers that are statistically random and repeatable. These bits may be applied as identifications, random number seeds or encryption keys in many security applications, e.g., a financial terminal. An integrator is coupled to a plurality of physical elements, selects two physical elements or element sets, and generates an integrated difference signal according to a difference between these two physical elements or element sets. A comparison-decision logic further determines whether the difference between the selected two physical elements is associated with a bit of “1” or “0”. In some embodiments, a multi-bit number constitutes multiple bits each of which may be derived from a difference between two randomly selected physical elements or element sets.

Abstract: Methods, systems, and arrangements enable increased security for a processor, including by implementing block encryption. The block may include multiple instructions and/or operations to be executed by the processor. The block may also include multiple bytes that are read into the processor byte by byte. Once a block-wide encrypted buffer has been filled from an external memory source, the block may be decrypted using an encryption algorithm (e.g., the Data Encryption Standard (DES), the triple DES, etc.), and the decrypted block may be forwarded to a decrypted buffer. The decrypted block may thereafter be moved into a cache, which may optionally be organized into an equivalent block width (e.g., for each way of a multi-way cache). Therefore, when a processing core/instruction decoder needs a new instruction, it may retrieve one from the cache, directly from the decrypted buffer, or from external memory (e.g., after undergoing decryption).

Abstract: Methods, systems, and arrangements enable increased security for a processor, including by implementing block encryption. The block may include multiple instructions and/or operations to be executed by the processor. The block may also include multiple bytes that are read into the processor byte by byte. Once a block-wide encrypted buffer has been filled from an external memory source, the block may be decrypted using an encryption algorithm (e.g., the Data Encryption Standard (DES), the triple DES, etc.), and the decrypted block may be forwarded to a decrypted buffer. The decrypted block may thereafter be moved into a cache, which may optionally be organized into an equivalent block width (e.g., for each way of a multi-way cache). Therefore, when a processing core/instruction decoder needs a new instruction, it may retrieve one from the cache, directly from the decrypted buffer, or from external memory (e.g., after undergoing decryption).