Abstract: Embodiments of the present disclosure provide an instruction processing apparatus, comprising a count buffer; an instruction fetching circuitry configured to store address-related information of a jump instruction into the count buffer and to determine an information identifier corresponding to the address-related information, wherein the address-related information comprises address information of the jump instruction in a storage device; and an instruction executing circuitry configured to acquire the address-related information of the jump instruction from the count buffer according to the information identifier and execute the jump instruction according to the address-related information.

Abstract: A processor core, a processor, an apparatus, and an instruction processing method are disclosed. The processor core includes: an instruction fetch unit, where the instruction fetch unit includes a speculative execution predictor and the speculative execution predictor compares a program counter of a memory access instruction with a table entry stored in the speculative execution predictor and marks the memory access instruction; a scheduler unit adapted to adjust a send order of marked memory access instructions and send the marked memory access instructions according to the send order; an execution unit adapted to execute the memory access instructions according to the send order. In the instruction fetch unit, a memory access instruction is marked according to a speculative execution prediction result. In the scheduler unit, a send order of memory access instructions is determined according to the marked memory access instruction and the memory access instructions are sent.

Abstract: Embodiments of the present disclosure provide an apparatus, comprising: one or more instruction executing circuitries, wherein each instruction executing circuitry of the one or more instruction executing circuitries is configured to execute an instruction of a corresponding instruction type, and an instruction scheduling circuitry that is communicatively coupled to the one or more instruction executing circuitries, the instruction scheduling circuitry is configured to: determine according to an instruction type of the instruction and a number of instructions that have been allocated to the one or more instruction executing circuitries, an instruction executing circuitry from the one or more instruction executing circuitries to schedule the instruction for execution, and allocated the instruction to the determined instruction executing circuitry.

Abstract: An instruction processing device and an instruction processing method are disclosed. The instruction processing device includes: an instruction boundary prediction unit including circuitry configured to acquire an instruction packet of a variable-length instruction set and to add instruction prediction information to a plurality of instruction meta-fields in the instruction packet; and an instruction pipeline structure comprising an instruction fetch unit including an instruction boundary determination unit including circuitry configured to determine instruction boundary information according to the instruction prediction information to obtain one or more instructions in the instruction packet.

Abstract: An instruction processing apparatus is disclosed and includes: an instruction cache, which maps data blocks in a memory based on a multi-way set-associative structure and includes a plurality of cache lines; and an access control unit, coupled between an instruction fetch unit and the instruction cache, and adapted to read the plurality of cache lines respectively by using a plurality of data channels, and select a hit cache line from the plurality of cache lines by using a plurality of selection channels, to obtain an instruction, where the access control unit includes a path prediction unit, where the path prediction unit obtains, based on a type of the instruction, path prediction information corresponding to an instruction address, and enables at least one data channel and/or at least one selection channel based on the path prediction information.

Abstract: The present invention discloses an interrupt controller, including: a sampling unit adapted to receive interrupts from various interrupt sources coupled to the interrupt controller and perform sampling on the received various interrupts; and a priority arbitration unit adapted to classify the received various interrupts into a plurality of interrupt segments, where each interrupt segment includes one or more sampled interrupts, and determine, segment by segment an interrupt with the highest priority in a selected segment, until an interrupt with the highest priority among all interrupts is identified through arbitration and used as an to-be-responded-to interrupt. The present invention further discloses a processor including the interrupt controller, and a system-on-chip.

Abstract: An instruction processing device and an instruction processing method are provided.

Abstract: The invention disclosed herein relates to 4,5,6,7-tetrahydro-1H-pyrazolo[4,3-c]pyridinyl compounds and 4,5,6,7-tetrahydro-2H-pyrazolo[4,3-c]pyridinyl compounds of Formula (A), pharmaceutical compositions comprising such compounds and the use of such compounds in the treatment of autoimmune diseases.

Abstract: A vascular access system which may be configured for blood draw may include a housing, which may include a distal end, a proximal end, and a slot disposed between the distal end and the proximal end. The slot may include a notch. The vascular access system may include a cannula hub, which may be disposed within the housing and movable with respect to the slot. The cannula hub may include a tab extending through the slot. The vascular access system may include a cannula extending distally from the cannula hub. In response to the tab being disposed within the notch, a distal tip of the cannula may be disposed within the housing. In response to advancing the tab along the slot to a distal end of the slot, the distal tip of the cannula is disposed distal to the distal end of the housing.

Abstract: An LED tube lamp includes a glass lamp tube, two end caps, an LED light strip, a power supply, and a diffusion film. The glass lamp tube includes a main body region and two rear end regions, each of the two rear end regions coupled to a respective end of the main body region and each of the two end caps coupled to a respective rear end region. A length of the light strip is longer than the length of a main body region of the glass lamp tube. Each of the two end caps is coupled to a respective end of the glass lamp tube by a adhesive. The LED light strip is attached to an inner circumferential surface of the glass lamp tube with a plurality of LED light sources mounted on the LED light strip. The diffusion film is disposed on an out surface of the glass lamp tube.

Abstract: An LED light bulb, comprising of: a lamp housing; a bulb base connected to the lamp housing; a stem connected to the bulb base and located in the lamp housing, the stem comprises a stand extending to the center of the lamp housing; a single LED filament, disposed in the lamp housing, the LED filament comprising: a plurality of LED sections, each of the LED sections includes at least two LED chips that are electrically connected to each other; a plurality of conductive sections, each of the conductive sections is located between the two adjacent LED sections and configured to electrically connect the two adjacent LED sections, each of the conductive sections includes at least one conductor that connects the two adjacent LED sections, each of the conductor has at least one through hole; a light conversion layer comprising a base layer and a top layer, wherein the base layer of the light conversion layer is filled into the through hole of the conductor and then contacting the surface of the top layer.

Abstract: An LED lamp comprises a lampshade, a base connected to the lampshade, a photoelectric module comprising a light source module and a power supply module disposed in an accommodating space formed between the lampshade and the base, the photoelectric module is detachably fixed to the base through a mounting portion.

Abstract: An LED lamp includes: a lamp shell; a passive heat dissipating element having a heat sink, and the heat sink including fins and a base and connecting to the lamp shell; a power source disposed in the lamp shell; and a light board connecting to the heat sink and including LED chips electrically connected to the power source. A chamber of the lamp shell is formed with a first heat dissipating channel. The first heat dissipating channel has a first air inlet at an end of the lamp shell. Another end of the lamp shell has a heat dissipating hole. A second heat dissipating channel is formed in the fins and base. The second heat dissipating channel has a second air inlet. Air flows into the second air inlet, passes through the second heat dissipating channel and flow out from spaces between every adjacent two of the fins.

Abstract: An LED lamp includes: a lamp shell including a lamp head and a lamp neck, the lamp head connects to the lamp neck; a passive heat dissipating element having a heat sink connected to the lamp shell, wherein the heat sink comprises fins, a total height of the lamp neck and the lamp head is greater than a height of the heat sink; a power source disposed in the lamp shell; and a light emitting surface connected to the heat sink of the passive heat dissipating element and comprising LED chips electrically connected to the power source.

Abstract: An LED tube lamp, comprising: a lamp tube; a first circuit board, disposed in the lamp tube, having a plurality of light sources mounted thereon; two lamp caps disposed at respective ends of the lamp tube; and a power supply substantially disposed in one or both of the two lamp caps, the power supply having a second circuit board, the second circuit board is electrically connected to the first circuit board. The lamp cap includes a body and an insulating portion, the insulating portion constitutes at least a part of an end of the lamp cap, the insulating portion has an inner side surface, and a slot is set on the inner side surface, the second circuit board is inserted into the slot for fastening.

Abstract: An LED tube lamp includes a tube having two ends, two end caps respectively at the ends of the tube, a power supply in one or both of the end caps, an LED light strip in the tube; and a plurality of LED light sources on the LED light strip. Each of the end caps comprises a lateral wall substantially coaxial with the tube, an end wall substantially perpendicular to an axial direction of the lateral wall, and at least one opening penetrating through the end wall. An axial direction of the at least one opening is substantially parallel with an axial direction of the lateral wall. The LED light sources electrically connected to the power supply via the LED light strip.

Abstract: Provided is a sweeping device for a photovoltaic panel, applied to a photovoltaic unit composed of a plurality of photovoltaic panel arrays arranged in sequence, the sweeping device comprises a guide rail mechanism composed by an upper rail and a lower rail respectively disposed on an upper side and a lower side of respective photovoltaic panel arrays and a plurality of scraper mechanisms for sweeping the plurality of photovoltaic panel arrays, and each photovoltaic panel array corresponds to one scraper mechanism at most, the respective scraper mechanisms are slidably disposed on the guide rail mechanism to which an arbitrary photovoltaic panel array corresponds; the sweeping device further comprises a pull rope mechanism for driving the respective scraper mechanisms to reciprocate on the photovoltaic unit, and a driving mechanism connected with the pull rope mechanism.