Abstract: A color-temperature-compensation (CTC) method and applications thereof are provided, and which includes determining intensities of weights of three colors in an inputted three-dimension color signal; if yes, performing a lookup table mechanism to find-out a first set of multi-primary-color (MPC) signal corresponding to the three colors with the same weights, and performing a digital-gamma-correction (DGC) to the first set of MPC signal for providing a first set of CTC signal accordingly; if no, performing the lookup table mechanism to find-out a second set of MPC signal corresponding to the three colors with different weights, and performing the DGC to the second set of MPC signal for providing a second set of CTC signal accordingly; and making at least one same color with the same intensity in the three colors with the same weights and in the three colors with different weights displaying on an MPC display have different brightness.

Abstract: A latching mechanism includes a base, a sliding member, a rotary member, and an elastic member. The sliding member can be moved down and up along the base, and includes a first limiting element and a second limiting element. The rotary member is pivotally secured to the base, and includes a first resisting element and a second resisting element. The elastic member is pivotally secured to the base. The elastic member can cause the rotary member to rotate toward different directions. When the rotary member is rotated to cause the first resisting element to be engaged with a bottom of the first limiting element, the latching mechanism is in a locked state. The second limiting element can resist the second resisting element to cause the rotary member to rotate until the first resisting element contacts the first limiting element.

Abstract: A device for picking up and positioning small pieces of adhesive tapes is provided. The device includes a number of suction members for picking up the adhesive tapes. The device further includes a driving unit to drive the suction members to move to various positions by turn, thereby positioning the adhesive tapes to various positions by turn.

Abstract: A display device includes a display panel, a light source module and a skin-color detector. The display panel has a plurality of sub pixel units, and the sub pixel units include red sub pixel units, green sub pixel units, blue sub pixel units and white sub pixel units. The light source module is disposed at a side of the display panel and the light source module includes a white light source and a yellow light source distributed in the white light source. The skin-color detector is electrically connected to the display panel, wherein the skin-color detector detects the skin-color area proportion of an image signal of the display panel.

Abstract: A color-temperature-compensation (CTC) method and applications thereof are provided, and which includes determining intensities of weights of three colors in an inputted three-dimension color signal; if yes, performing a lookup table mechanism to find-out a first set of multi-primary-color (MPC) signal corresponding to the three colors with the same weights, and performing a digital-gamma-correction (DGC) to the first set of MPC signal for providing a first set of CTC signal accordingly; if no, performing the lookup table mechanism to find-out a second set of MPC signal corresponding to the three colors with different weights, and performing the DGC to the second set of MPC signal for providing a second set of CTC signal accordingly; and making at least one same color with the same intensity in the three colors with the same weights and in the three colors with different weights displaying on an MPC display have different brightness.

Abstract: An exemplary display device driving method is applied to a display device. The display device includes a pixel array and a data driving circuit. The pixel array has first through fourth pixels. Each of the first through fourth pixels includes first through fourth sub-pixels. In the display device driving method, each of the first through fourth pixels is provided with a data signal. At least one colored sub-pixel is enabled to display a second gray level in turns in multiple frames of a same frequency period, and the remained sub-pixels are enabled to display a first gray level smaller than the second gray level.

Abstract: A display device includes a display panel, a light source module and a skin-color detector. The display panel has a plurality of sub pixel units, and the sub pixel units include red sub pixel units, green sub pixel units, blue sub pixel units and white sub pixel units. The light source module is disposed at a side of the display panel and the light source module includes a white light source and a yellow light source distributed in the white light source. The skin-color detector is electrically connected to the display panel, wherein the skin-color detector detects the skin-color area proportion of an image signal of the display panel.

Abstract: A method and corresponding apparatus for compiling high-level languages into specific processor architectures are provided. In this embodiment, the specific processor is encapsulated in a virtual processor interface with simple instruction set architecture, and a compiler translates application programs into corresponding assembly codes. Further, the difficulty of the compiler design is reduced.

Abstract: An inter-cluster communication module using the memory access network is provided, including a plurality of clusters, a memory subsystem, a controller and a switch device. When some clusters issue a load instruction and some clusters issue a store instruction of an identical memory address concurrently, the controller controls the switch device which connects the clusters and the memory banks of the memory subsystem, so that the data item is transmitted from the cluster issuing the store instruction to the cluster issuing the load instruction through the switch device, thereby achieving data exchange between the clusters. Herein, the data item is selectively stored in the memory module depending on the address. Furthermore, the data item is also transmitted between the memory and the clusters over the switch device.

Abstract: An apparatus for cooperative sharing of operand access port of a banked register file comprises a partitioned register file, a first group of functional unit, a second group of function units and an access control circuit. The access control circuit includes three control bits to control the accesses to the register file by the functional units for operands. The invention is to relax the constraint encountered by the compiler and a smart assembler using a conventional Ping-Pong file register. The relaxed constraint allows the two banks of the partitioned register file accessed by two instructions simultaneously as long as each corresponding operand of the two instructions are in different register banks. By the relaxed constraint, a compiler and a smart assembler have more choices to schedule instructions in a program, potentially increasing program performance.

Abstract: A method and corresponding apparatus for compiling high-level languages into specific processor architectures are provided. In this embodiment, the specific processor is encapsulated in a virtual processor interface with simple instruction set architecture, and a compiler translates application programs into corresponding assembly codes. Further, the difficulty of the compiler design is reduced.

Abstract: A unified single-core and multi-mode processor and its program execution method are provided. In an embodiment of this processor, a single instruction stream is different types of instructions randomly arranged in thereof. The processor switches its modes based on the type of a fetched instruction to execute the program corresponding to the fetched instruction.

Abstract: An inter-cluster communication module using the memory access network is provided, including a plurality of clusters, a memory subsystem, a controller and a switch device. When some clusters issue a load instruction and some clusters issue a store instruction of an identical memory address concurrently, the controller controls the switch device which connects the clusters and the memory banks of the memory subsystem, so that the data item is transmitted from the cluster issuing the store instruction to the cluster issuing the load instruction through the switch device, thereby achieving data exchange between the clusters. Herein, the data item is selectively stored in the memory module depending on the address. Furthermore, the data item is also transmitted between the memory and the clusters over the switch device.

Abstract: A reconfigurable radio processor comprises a task interface and an execution kernel. The processor can be applied to a platform comprising a main processor and on-chip bus, and uses a task-based interface between the main processor and the radio processor. The radio processor simplifies the designs for control system, instruction set and data path. The bus interface includes a task dispatcher. The execution kernel comprises a global control unit, at least one function unit, an operation network, and a data network. The radio processor meets the reconfigurable and scalable requirements. It allows system designers to realize many applications on an IC chip, as well as increases the add-on values for the product. It provides system designers with the possibility of replacing another main processor under a special consideration.

Abstract: An encoding method for a very long instruction word (VLIW) DSP processor and decoding method thereof. The encoding method involves a plurality of first encoding portions and a plurality of second encoding portions. The first encoding portions and second encoding portions are complied from an instruction. The first encoding portions are sequentially arranged after an instruction package CAP, and the second encoding portions are sequentially arranged after the first encoding portions.

Abstract: A floating point arithmetic unit for embedded digital signal processing is provided with the ability of tracking the exponent portion of numerals using static analyzing technology efficiently and of low-power consumption. A fix adding unit with a simplified mantissa alignment device and simplified normalizing device arranged at the input end and output end, a fix multiplying unit with a simplified normalizing device arranged at the output end, and a shifter are included in the floating point arithmetic unit. A shift control method in accordance the floating point arithmetic unit is also provided to prevent overflow of the peak of the numerals. According the unit and the method, the effective precision of the arithmetic result is higher. The hardware configuration, power consumption and chip area are similar with fix point arithmetic units, while the precision is close to the floating point arithmetic units with complicated configuration.

Abstract: A reconfigurable radio processor comprises a task interface and an execution kernel. The processor can be applied to a platform comprising a main processor and on-chip bus, and uses a task-based interface between the main processor and the radio processor. The radio processor simplifies the designs for control system, instruction set and data path. The bus interface includes a task dispatcher. The execution kernel comprises a global control unit, at least one function unit, an operation network, and a data network. The radio processor meets the reconfigurable and scalable requirements. It allows system designers to realize many applications on an IC chip, as well as increases the add-on values for the product. It provides system designers with the probability of replacing another main processor under a special consideration.