Patents by Inventor Tao Ying
Tao Ying has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240116976Abstract: A cordycepin-based derived compound with an anti-tumor effect, and a structure of the compound is as shown in formula I; a cordycepin derivative and a pharmaceutical composition thereof provided by the invention have a good anti-tumor proliferation effect; compared with a parent drug, the cordycepin derivative has better affinity to cell membranes, so that a half-life period of in-vivo metabolism of the drug is longer, and in-vivo remaining time of the drug is longer; compared with other nucleoside anti-tumor drugs, the cordycepin derivative and the pharmaceutical composition thereof provided by the invention have wider types and action ranges of tumors, have excellent inhibition effects on a gastric cancer, a pancreatic cancer, a liver cancer, a small cell lung cancer, a colorectal cancer, melanoma, an ovarian cancer and the like, and have lower side effects and better curative effects.Type: ApplicationFiled: November 9, 2023Publication date: April 11, 2024Applicant: NANJING TECH UNIVERSITYInventors: Hanjie YING, Tao SHEN, Chenglun TANG, Dong LIU, Yong CHEN, Chenjie ZHU, Pengpeng YANG, Wei ZHUANG
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Publication number: 20240111595Abstract: In accordance with an embodiment, a method is applied to a first device; the first device is connected to a second device; the first device includes a first application; the first application includes a plurality of capability modules configured to be used for installation; and the capability module is configured to implement one or more functions. The method includes: The first device determines, based on capability information of the second devices, a first target capability module suitable for installation on the second devices from the plurality of capability modules included in the first application. The first device sends the first target capability module to the second devices.Type: ApplicationFiled: December 6, 2023Publication date: April 4, 2024Inventors: Guofeng Ying, Tao Yu
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Publication number: 20240100020Abstract: The present disclosure provides a pharmaceutical composition for relieving or eliminating opioid withdrawal syndrome and a preparation method therefor. The pharmaceutical composition includes clonidine hydrochloride and tramadol hydrochloride. A compound tablet of the pharmaceutical composition is made of clonidine hydrochloride, tramadol hydrochloride, lactose hydrous, microcrystalline cellulose, silicon dioxide and magnesium stearate. The preparation method includes the following steps: (1) dissolving a formulated amount of clonidine hydrochloride in water, granulating with a formulated amount of microcrystalline cellulose, sieving, and oven-drying to obtain granules; and (2) mixing the granules obtained at step (1) with a formulated amount of tramadol hydrochloride and a formulated amount of lactose hydrate, adding a formulated amount of silicon dioxide and a formulated amount of magnesium stearate, mixing, compressing into tablets, and coating to obtain compound tablets.Type: ApplicationFiled: December 10, 2020Publication date: March 28, 2024Inventors: Zhenglin Liang, Shugui Ying, Xiegue Yan, Shiqiang Wang, Tao Zhang
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Publication number: 20240078735Abstract: A sliced graphics processing unit (GPU) architecture in processor-based devices is disclosed. In some aspects, a GPU based on a sliced GPU architecture includes multiple hardware slices. The GPU further includes a command processor (CP) circuit and an unslice primitive controller (PC_US). Upon receiving a graphics instruction from a central processing unit (CPU), the CP circuit determines a graphics workload, and transmits the graphics workload to the PC_US. The PC_US then partitions the graphics workload into multiple subbatches and distributes each subbatch to a PC_S of a hardware slice for processing.Type: ApplicationFiled: December 19, 2022Publication date: March 7, 2024Inventors: Jian Liang, Andrew Evan Gruber, Tao Wang, Xuefeng Tang, Vishwanath Shashikant Nikam, Nigel Poole, Kalyan Kumar Bhiravabhatla, Fei Xu, Zilin Ying
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Publication number: 20240078737Abstract: A sliced graphics processing unit (GPU) architecture in processor-based devices is disclosed. In some aspects, a GPU based on a sliced GPU architecture includes multiple hardware slices. The GPU further includes a command processor (CP) circuit and an unslice primitive controller (PC_US). Upon receiving a graphics instruction from a central processing unit (CPU), the CP circuit determines a graphics workload, and transmits the graphics workload to the PC_US. The PC_US then partitions the graphics workload into multiple subbatches and distributes each subbatch to a PC_S of a hardware slice for processing.Type: ApplicationFiled: May 19, 2023Publication date: March 7, 2024Inventors: Jian LIANG, Andrew Evan GRUBER, Tao WANG, Xuefeng TANG, Vishwanath Shashikant NIKAM, Nigel POOLE, Kalyan Kumar BHIRAVABHATLA, Fei XU, Zilin YING
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Publication number: 20240066747Abstract: A nail gun having a striking member installation mechanism comprises a casing having a main casing body, and a striking member baffle removably disposed over a replacement opening of the main casing body; a striking member removably disposed inside the main casing body and below the striking member baffle; and a striking member driving assembly having a piston for driving the striking member in a reciprocating motion direction, wherein the striking member has a striking member tail, a protruding part, and a guiding striking part; wherein the piston comprises a striking member connector having a protruding part receiving hole; and wherein the protruding part is removably received in the protruding part receiving hole.Type: ApplicationFiled: August 25, 2023Publication date: February 29, 2024Inventors: Tao Yang, Mingjun Yang, Qinling Ying, Haijun Li, Bingzhen Jiang
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Publication number: 20230069275Abstract: The present invention relates to a high-strength, high-corrosion resistance ternary magnesium alloy and a preparation method therefor, the magnesium alloy comprising the following element components by mass percentage: 8-12 wt % of Y, 0.6-3 wt % of Al and the remainder being Mg. The method comprises: (1) under a protective atmosphere, preparing a Mg—Y intermediate alloy, an aluminum ingot and a magnesium ingot into a magnesium alloy melt; (2) under a protective atmosphere, allowing the magnesium alloy melt to stand after stirring, then carrying out refining, degassing, and slag removal, allowing the magnesium alloy melt to stand again, then thermally insulating to obtain a magnesium alloy liquid; and (3) casting and molding the magnesium alloy liquid under a protective atmosphere, and forming a cast ingot; the three steps above ultimately obtain a high-strength, high-corrosion resistance ternary magnesium alloy.Type: ApplicationFiled: March 15, 2021Publication date: March 2, 2023Applicant: Shanghai Jiao Tong UniversityInventors: Yangxin LI, Xiaoqin ZENG, Qingchun ZHU, Tao YING
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Publication number: 20220349843Abstract: The present invention provides a detection method for radiation-induced defects of an oxide layer in electronic devices. The detection method includes the following steps: selecting a semiconductor material to be prepared into a substrate; preparing a back electrode on an upper surface of the substrate; growing an oxide layer on the back electrode; etching one side of the oxide layer, and exposing an etched part out of the back electrode; preparing a front electrode on an upper surface of the oxide layer; forming a plurality of grooves in the front electrode, and distributing the plurality of grooves in a grid shape to prepare a test sample; and performing a radiation test on the test sample, and detecting radiation-induced defects. By using the detection method provided by the present invention, rapid identification and detection of electrons and holes are achieved.Type: ApplicationFiled: July 27, 2021Publication date: November 3, 2022Applicant: Harbin Institute of TechnologyInventors: Xingji Li, Jianqun Yang, Xiaodong Xu, Gang Lv, Xiuhai Cui, Tao Ying, Yadong Wei
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Publication number: 20220349934Abstract: The present invention provides a detection method for sensitive parts of ionization damage in a bipolar transistor, which includes the following steps: selecting an irradiation source, and carrying out irradiation test on the bipolar transistor to be tested; installing the irradiated bipolar transistor on a test bench of a deep level transient spectroscopy system, and setting test parameters; selecting at least two different bias voltages, and testing the bipolar transistor to obtain a deep level transient spectrum; determining whether a defect is an ionization defect according to a peak position of the defect signal in the deep level transient spectrum; determining the defect type as oxidation trapped charges or an interface state according to the level of the defect signal in the deep level transient spectrum; and determining the sensitive area of ionization damage in the bipolar transistor according to the determination result of the defect signal type.Type: ApplicationFiled: July 27, 2021Publication date: November 3, 2022Applicant: Harbin Institute of TechnologyInventors: Xingji Li, Jianqun Yang, Gang Lv, Yadong Wei, Xiaodong Xu, Tao Ying, Xiuhai Cui
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Patent number: 6995596Abstract: The precharge circuit includes circuitry for initiating charging of a precharge pulse at a first edge of a first clock-like signal. The precharge circuit also includes circuitry for ending the charging of the precharge pulse after a time period that is longer of a preset delay period and a time period designated by a second edge of the second clock-like signal.Type: GrantFiled: October 14, 2003Date of Patent: February 7, 2006Assignee: Sun Microsystems, Inc.Inventor: Tao-Ying Yau
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Publication number: 20050077940Abstract: A precharge circuit capable of generating a precharge pulse is provided. The precharge circuit includes circuitry for initiating charging of a precharge pulse at a first edge of a first clock-like signal. The precharge circuit also includes circuitry for ending the charging of the precharge pulse after a time period that is longer of a preset delay period and a time period designated by a second edge of the second clock-like signal. Methods for generating a precharge pulse are also included.Type: ApplicationFiled: October 14, 2003Publication date: April 14, 2005Applicant: Sun Microsystems, Inc.Inventor: Tao-Ying Yau
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Patent number: 6498516Abstract: A system for minimizing the effect of clock skew in a bit line write driver includes a first control circuit coupled to the bit line write driver; and a second control circuit coupled to the bit line write driver. The bit line write driver outputs a first output signal and a second output signal. A method of minimizing the effect of clock skew in a bit line write driver includes outputting a first signal and a second signal from the bit line write driver; controlling the outputting of the second signal from the bit line write driver based on a feedback of the first signal; and controlling the outputting of the first signal from the bit line write driver based on feedback of the second signal.Type: GrantFiled: May 15, 2001Date of Patent: December 24, 2002Assignee: Sun Microsystems, Inc.Inventor: Tao-ying Yau
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Patent number: 6498520Abstract: A system for minimizing the effect of clock skew in a precharge circuit includes a switch coupled between an input to the precharge circuit and a global bitline; and a control circuit coupled to a precharge component and the switch. The control circuit determines whether the switch and the precharge component are activated and the control circuit receives feedback from the switch. A method of minimizing the effect of clock skew in a precharge circuit includes controlling whether an input signal outputting a first signal and a second signal from the precharge circuit; controlling the outputting of the second signal from the precharge circuit based on a clock signal, a select signal, and a dynamic signal.Type: GrantFiled: October 9, 2001Date of Patent: December 24, 2002Assignee: Sun Microsystems, Inc.Inventors: Tao-ying Yau, Ping Wang, Xiaozhen Guo
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Publication number: 20020171463Abstract: A system for minimizing the effect of clock skew in a bit line write driver includes a first control circuit coupled to the bit line write driver; and a second control circuit coupled to the bit line write driver. The bit line write driver outputs a first output signal and a second output signal. The first control circuit receives feedback from the second output signal and controls whether the bit line write driver outputs the first output signal based on the feedback from the second output signal and the second control circuit receives feedback from the first output signal and controls whether the bit line write driver outputs the second output signal based on the feedback from the first output signal.Type: ApplicationFiled: May 15, 2001Publication date: November 21, 2002Inventor: Tao-Ying Yau