Patents by Inventor Tapan Samaddar
Tapan Samaddar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20200327972Abstract: A system and a process for automatic detection of medical adherence in a medical device is disclosed. The process includes automatically detecting a state change of a medical device based on a motion of the medical device. The state change may be from a closed state to an open state. It is determined whether a state change processor is within a range of the medical device. The state change processor monitors medical or medicine adherence. Upon determining that the state change processor is within the range of the medical device, state change information is sent to the state change processor. A real time change data when the medical activity detector and the state change detector are within a communication range is stored.Type: ApplicationFiled: April 9, 2019Publication date: October 15, 2020Inventors: Arunprasad Ramiya Mothilal, Tapan Samaddar
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Publication number: 20180126273Abstract: A system for promoting medication adherence is provided. The system may receive medical information and medication access information via a medication adherence device, the medication adherence device having a housing configured to be removably coupled to a medicine container top and an access switch, the access switch generating medication access information when the housing is uncoupled from the medicine container top. The information may be used to form one or more blind spots which may be representative of symptoms of glaucoma and which may be produced on the display screen of a patient's client device. The system may use Gamblification and/or Gamification in which a blind spot obscures portions of a game of chance program and/or novelty game type program, respectively, from being observed on the display screen of the client device.Type: ApplicationFiled: November 9, 2017Publication date: May 10, 2018Applicant: Agape Assets, LLCInventors: Scott E. Lee, Arunprasad Ramiya Mothilal, Tapan Samaddar, Carl Wong, Albert Alaan
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Patent number: 8472255Abstract: To program a set of non-volatile storage elements, a set of programming pulses are applied to the control gates (or other terminals) of the non-volatile storage elements. The programming pulses have pulse widths that vary as a function of simulated pulse magnitude data. The programming pulses can also have pulse magnitudes that vary based on measurements taken while testing the set of non-volatile storage elements. In one embodiment, the pulse widths are determined after simulation performed prior to fabrication of the non-volatile storage elements. In another embodiment, the pulse magnitudes are calculated after fabrication of the non-volatile storage elements.Type: GrantFiled: September 6, 2012Date of Patent: June 25, 2013Assignee: SanDisk Technologies Inc.Inventors: Nima Mokhlesi, Dengtao Zhao, Henry Chin, Tapan Samaddar
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Publication number: 20120327716Abstract: To program a set of non-volatile storage elements, a set of programming pulses are applied to the control gates (or other terminals) of the non-volatile storage elements. The programming pulses have pulse widths that vary as a function of simulated pulse magnitude data. The programming pulses can also have pulse magnitudes that vary based on measurements taken while testing the set of non-volatile storage elements. In one embodiment, the pulse widths are determined after simulation performed prior to fabrication of the non-volatile storage elements. In another embodiment, the pulse magnitudes are calculated after fabrication of the non-volatile storage elements.Type: ApplicationFiled: September 6, 2012Publication date: December 27, 2012Inventors: Nima Mokhlesi, Dengtao Zhao, Henry Chin, Tapan Samaddar
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Patent number: 8284609Abstract: To program a set of non-volatile storage elements, a set of programming pulses are applied to the control gates (or other terminals) of the non-volatile storage elements. The programming pulses have pulse widths that vary as a function of simulated pulse magnitude data. The programming pulses can also have pulse magnitudes that vary based on measurements taken while testing the set of non-volatile storage elements. In one embodiment, the pulse widths are determined after simulation performed prior to fabrication of the non-volatile storage elements. In another embodiment, the pulse magnitudes are calculated after fabrication of the non-volatile storage elements.Type: GrantFiled: June 2, 2011Date of Patent: October 9, 2012Assignee: SanDisk Technologies Inc.Inventors: Nima Mokhlesi, Dengtao Zhao, Henry Chin, Tapan Samaddar
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Publication number: 20110235428Abstract: To program a set of non-volatile storage elements, a set of programming pulses are applied to the control gates (or other terminals) of the non-volatile storage elements. The programming pulses have pulse widths that vary as a function of simulated pulse magnitude data. The programming pulses can also have pulse magnitudes that vary based on measurements taken while testing the set of non-volatile storage elements. In one embodiment, the pulse widths are determined after simulation performed prior to fabrication of the non-volatile storage elements. In another embodiment, the pulse magnitudes are calculated after fabrication of the non-volatile storage elements.Type: ApplicationFiled: June 2, 2011Publication date: September 29, 2011Inventors: Nima Mokhlesi, Dengtao Zhao, Henry Chin, Tapan Samaddar
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Patent number: 7978520Abstract: To program a set of non-volatile storage elements, a set of programming pulses are applied to the control gates (or other terminals) of the non-volatile storage elements. The programming pulses have pulse widths that vary as a function of simulated pulse magnitude data. The programming pulses can also have pulse magnitudes that vary based on measurements taken while testing the set of non-volatile storage elements. In one embodiment, the pulse widths are determined after simulation performed prior to fabrication of the non-volatile storage elements. In another embodiment, the pulse magnitudes are calculated after fabrication of the non-volatile storage elements.Type: GrantFiled: September 27, 2007Date of Patent: July 12, 2011Assignee: SanDisk CorporationInventors: Nima Mokhlesi, Dengtao Zhao, Henry Chin, Tapan Samaddar
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Patent number: 7551477Abstract: An array of non-volatile storage elements includes a first group of non-volatile storage elements connected to a selected word line, a second group of non-volatile storage elements connected to the selected word line, a first group of bit lines in communication with the first group of non-volatile storage elements, a second group of bit lines in communication with the second group of non-volatile storage elements, a first set of sense modules located at a first location and connected to the first group of bit lines, and a second set of sense modules located at a second location and connected to the second group of bit lines. The first set of sense modules applies a first bit line voltage based on the bit line distance between the first set of sense modules and the first group of non-volatile storage elements. The second set of sense modules applies a second bit line voltage based on the bit line distance between the second set of sense modules and the second group of non-volatile storage elements.Type: GrantFiled: September 26, 2007Date of Patent: June 23, 2009Assignee: SanDisk CorporationInventors: Nima Mokhlesi, Dengtao Zhao, Man Mui, Hao Nguyen, Seungpil Lee, Deepak Chandra Sekar, Tapan Samaddar
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Publication number: 20090086544Abstract: To program a set of non-volatile storage elements, a set of programming pulses are applied to the control gates (or other terminals) of the non-volatile storage elements. The programming pulses have pulse widths that vary as a function of simulated pulse magnitude data. The programming pulses can also have pulse magnitudes that vary based on measurements taken while testing the set of non-volatile storage elements. In one embodiment, the pulse widths are determined after simulation performed prior to fabrication of the non-volatile storage elements. In another embodiment, the pulse magnitudes are calculated after fabrication of the non-volatile storage elements.Type: ApplicationFiled: September 27, 2007Publication date: April 2, 2009Inventors: Nima Mokhlesi, Dengtao Zhao, Henry Chin, Tapan Samaddar
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Publication number: 20090080265Abstract: An array of non-volatile storage elements includes a first group of non-volatile storage elements connected to a selected word line, a second group of non-volatile storage elements connected to the selected word line, a first group of bit lines in communication with the first group of non-volatile storage elements, a second group of bit lines in communication with the second group of non-volatile storage elements, a first set of sense modules located at a first location and connected to the first group of bit lines, and a second set of sense modules located at a second location and connected to the second group of bit lines. The first set of sense modules applies a first bit line voltage based on the bit line distance between the first set of sense modules and the first group of non-volatile storage elements. The second set of sense modules applies a second bit line voltage based on the bit line distance between the second set of sense modules and the second group of non-volatile storage elements.Type: ApplicationFiled: September 26, 2007Publication date: March 26, 2009Inventors: Nima Mokhlesi, Dengtao Zhao, Man Mui, Hao Nguyen, Seungpil Lee, Deepak Chandra Sekar, Tapan Samaddar
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Patent number: 7123508Abstract: A reference cell produces a reference current that is about half of the current produced by a memory cell. The reference cell is essentially the same as the memory cell with an additional current reduction device that can be a transistor. Adjusting a reference voltage applied to the transistor allows the reference current to be varied. A control circuit to produce the reference voltage includes dedicated memory and reference cells and a feedback circuit that compares the two cells' currents. The feedback circuit applies the reference voltage to the reference cell of the control circuit and adjusts the reference voltage until the current from the reference cell is about half of the current from the memory cell. The reference voltage is then applied to other reference cells in a memory array.Type: GrantFiled: August 17, 2004Date of Patent: October 17, 2006Assignee: T-RAM, Inc.Inventors: Andrew Horch, Tapan Samaddar
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Patent number: 7064977Abstract: A reference cell produces a reference current that is about half of the current produced by a memory cell. The reference cell is essentially the same as the memory cell with an additional current reduction device that can be a transistor. Adjusting a reference voltage applied to the transistor allows the reference current to be varied. A control circuit to produce the reference voltage includes dedicated memory and reference cells and a feedback circuit that compares the two cells' currents. The feedback circuit applies the reference voltage to the reference cell of the control circuit and adjusts the reference voltage until the current from the reference cell is about half of the current from the memory cell. The reference voltage is then applied to other reference cells in a memory array.Type: GrantFiled: May 20, 2005Date of Patent: June 20, 2006Assignee: T-RAM, Inc.Inventors: Andrew Horch, Tapan Samaddar, Scott Robins
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Patent number: 6940772Abstract: A reference cell produces a reference current that is about half of the current produced by a memory cell. The reference cell is essentially the same as the memory cell with an additional current reduction device that can be a transistor. Adjusting a reference voltage applied to the transistor allows the reference current to be varied. A control circuit to produce the reference voltage includes dedicated memory and reference cells and a feedback circuit that compares the two cells' currents. The feedback circuit applies the reference voltage to the reference cell of the control circuit and adjusts the reference voltage until the current from the reference cell is about half of the current from the memory cell. The reference voltage is then applied to other reference cells in a memory array.Type: GrantFiled: March 18, 2002Date of Patent: September 6, 2005Inventors: Andrew Horch, Tapan Samaddar, Scott Robins
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Patent number: 6937085Abstract: The voltage comparator of the present invention comprises a sense amplifier connected to a latch. The sense amplifier has a first input terminal for connecting to the input voltage under consideration and a second input terminal for connecting to the reference voltage. The sense amplifier generates two voltages of opposite logic values (i.e., high or low). A latch accepts these two voltages and generates an output voltage that is indicative of whether the voltage under consideration is higher or lower than the reference voltage. In another embodiment, a signal conditioning circuit is used to reduce the transients in the input voltage under consideration and perform level shifting function.Type: GrantFiled: April 25, 2003Date of Patent: August 30, 2005Assignee: T-Ram, Inc.Inventor: Tapan Samaddar
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Patent number: 6901021Abstract: A reference cell produces a reference current that is about half of the current produced by a memory cell. The reference cell is essentially the same as the memory cell with an additional current reduction device that can be a transistor. Adjusting a reference voltage applied to the transistor allows the reference current to be varied. A control circuit to produce the reference voltage includes dedicated memory and reference cells and a feedback circuit that compares the two cell' currents. The feedback circuit applies the reference voltage to the reference cell of the control circuit and adjusts the reference voltage until the current from the reference cell is about half of th current from the memory cell. The reference voltage is then applied to other reference cells in a memory array.Type: GrantFiled: May 4, 2004Date of Patent: May 31, 2005Assignee: T-Ram, Inc.Inventors: Andrew Horch, Tapan Samaddar, Scott Robins
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Patent number: 6781888Abstract: A reference cell produces a reference current that is about half of the current produced by a memory cell. The reference cell is essentially the same as the memory cell with an additional current reduction device that can be a transistor. Adjusting a reference voltage applied to the transistor allows the current to be varied. A control circuit to produce the reference voltage includes dedicated memory and reference cells and a feedback circuit that compares the two cells' currents. The feedback circuit applies the reference voltage to the reference cell of the control circuit and adjusts the reference voltage until the current from the reference cell is about half the current of the memory cell. The reference voltage is then applied to other reference cells in a memory array.Type: GrantFiled: June 10, 2002Date of Patent: August 24, 2004Assignee: T-RAM, Inc.Inventors: Andrew Horch, Tapan Samaddar