Abstract: In one implementation, an optimized multi-root input-output virtualization (MRIOV) aware switch configured to route data between multiple root complexes and I/O devices is described. The MRIOV aware switch may include two or more upstream ports and one or more downstream ports. Each of an upstream port and a downstream port may include a media access controller (MAC) configured to negotiate link width and link speed for exchange of data packets between the multiple root complexes and the I/O devices. Each of an upstream port and a downstream port may further include a clocking module configured to dynamically configure a clock rate of processing data packets based one or more negotiated link width and negotiated link speed, and a data link layer (DLL) coupled to the MAC configured to operate at the clock rate, wherein the clock rate is indicative of processing speed.

Abstract: Systems and methods for sharing a single root I/O virtualization (SR-IOV) device (106) amongst a plurality of roots (104) are described herein. The described systems implement a method which includes identifying a physical function (PF) and a plurality of virtual functions (VFs) associated with the SR-IOV device (106). The method also include generating at least one set of VFs from amongst the plurality of identified VFs, where each set of VFs include one or more VFs, and generating a pseudo PF (PPF) for each of the at least one set of VFs, where each PPF and a set of VFs associated with the PPF forms a projected SR-IOV device (106). The method further includes associating each of the projected SR-IOV device (106) with a root (104) from amongst the plurality of roots (104) to allow sharing of the SR-IOV device (106).

Abstract: Systems and methods for sharing a single root I/O virtualization (SR-IOV) device (106) amongst a plurality of roots (104) are described herein. The described systems implement a method which includes identifying a physical function (PF) and a plurality of virtual functions (VFs) associated with the SR-IOV device (106). The method also include generating at least one set of VFs from amongst the plurality of identified VFs, where each set of VFs include one or more VFs, and generating a pseudo PF (PPF) for each of the at least one set of VFs, where each PPF and a set of VFs associated with the PPF forms a projected SR-IOV device (106). The method further includes associating each of the projected SR-IOV device (106) with a root (104) from amongst the plurality of roots (104) to allow sharing of the SR-IOV device (106).

Abstract: In one implementation, an optimized multi-root input-output virtualization (MRIOV) aware switch configured to route data between multiple root complexes and I/O devices is described. The MRIOV aware switch may include two or more upstream ports and one or more downstream ports. Each of an upstream port and a downstream port may include a media access controller (MAC) configured to negotiate link width and link speed for exchange of data packets between the multiple root complexes and the I/O devices. Each of an upstream port and a downstream port may further include a clocking module configured to dynamically configure a clock rate of processing data packets based one or more negotiated link width and negotiated link speed, and a data link layer (DLL) coupled to the MAC configured to operate at the clock rate, wherein the clock rate is indicative of processing speed.

Abstract: A system having a multi protocol multi-root aware (MP-MRA) switch (102) configured to route data between multiple host processors (104) and multiple I/O devices (106) is described herein. In said embodiment, the MP-MRIOV aware switch includes a switch routing module (108), at least one upstream adaptive module (110), and at least one downstream adaptive module (112). The upstream adaptive module (110) is configured to map information in a primary communication protocol to a intermediate communication protocol at which the switch routing module operates. Further, the downstream adaptive module (112) maps the intermediate communication protocol to a secondary communication protocol at which the I/O device (106) operates.