Abstract: A semiconductor processing apparatus includes a process chamber that defines an enclosure. The enclosure includes a substrate support configured to support a substrate and rotate the substrate about a central axis of the process chamber. The substrate support is also configured to move vertically along the central axis and position the substrate at multiple locations in the enclosure. The apparatus also includes one or more UV lamps configured to irradiate a top surface of the substrate supported on the substrate support.

Abstract: An apparatus includes a reflector system having a support, a reflector and a spring structure for scanning motion of the reflector in two orthogonal oscillation modes. A frequency response peaks at a natural resonant frequency with an initial bandwidth. A first transducer structure provides mechanical actuation of the reflector; a second transducer structure generates sense signals representing mechanical motion of the reflector. A feedback circuit receives from the second transducer structure a sense signal and generates to the first transducer structure a drive signal. The feedback circuit is adjusts amplitude and frequency of the drive signal to a non-linear vibration range where a frequency shift at the peak frequency is at least ten times the initial bandwidth, varies the amplitude of the drive signal in proportion to a waveform of a modulation signal, and sets frequency of the modulation signal component smaller than the frequency shift at the peak frequency.

Abstract: An optical device formed of a mirror wafer, a cap wafer, and a glass wafer. The mirror wafer includes a first layer of electrically conductive material, a second layer of electrically conductive material, and a third layer of electrically insulating material between the first layer and the second layer. A mirror element is formed of the second layer of the mirror wafer, and has a reflective surface in the bottom of a cavity opened into at least the first layer. A good optical quality planar glass wafer can be used to enclose the mirror element when the mirror wafer, cap wafer, and glass wafer are bonded to each other.

Abstract: An apparatus includes a reflector system having a support, a reflector and a spring structure for scanning motion of the reflector in two orthogonal oscillation modes. A frequency response peaks at a natural resonant frequency with an initial bandwidth. A first transducer structure provides mechanical actuation of the reflector; a second transducer structure generates sense signals representing mechanical motion of the reflector. A feedback circuit receives from the second transducer structure a sense signal and generates to the first transducer structure a drive signal. The feedback circuit is adjusts amplitude and frequency of the drive signal to a non-linear vibration range where a frequency shift at the peak frequency is at least ten times the initial bandwidth, varies the amplitude of the drive signal in proportion to a waveform of a modulation signal, and sets frequency of the modulation signal component smaller than the frequency shift at the peak frequency.

Abstract: A method and apparatus can be configured to automatically trigger a notifying event when a failure occurs. The method can also store information specifically relating to the failure. The storing is performed upon the automatic triggering of the notifying event. The specific information is stored such that the specific information persists after a system restart.

Abstract: An optical device formed of a mirror wafer, a cap wafer, and a glass wafer. The mirror wafer includes a first layer of electrically conductive material, a second layer of electrically conductive material, and a third layer of electrically insulating material between the first layer and the second layer. A mirror element is formed of the second layer of the mirror wafer, and has a reflective surface in the bottom of a cavity opened into at least the first layer. A good optical quality planar glass wafer can be used to enclose the mirror element when the mirror wafer, cap wafer, and glass wafer are bonded to each other.

Abstract: A method and apparatus can be configured to automatically trigger a notifying event when a failure occurs. The method can also store information specifically relating to the failure. The storing is performed upon the automatic triggering of the notifying event. The specific information is stored such that the specific information persists after a system restart.

Abstract: Electrochemiluminescent technique and device suitable for cheap analytical and diagnostic applications, with electrodes manufactured from carbon paste and terbium chelates as labeling compounds.

Abstract: The invention describes novel chemiluminescence electrode devices and their novel properties to enable achieving luminescence signal by electrical excitation by cathodic or bipolar pulses in aqueous electrolyte solutions. These devices form a significant improvement in construction of cheap and reliable means for especially diagnosis of health conditions in point-of-need purposes.

Abstract: The present invention provides a method for forming a semiconductor device, as well as a semiconductor device. The method for manufacturing a semiconductor device, among others, includes providing a gate structure (240) over a substrate (210), the gate structure (240) including a gate electrode (248) located over a nitrided gate dielectric (243), and forming a nitrided region (310) over a sidewall of the nitrided gate dielectric (243).

Abstract: Electrochemiluminescent technique and device suitable for cheap analytical and diagnostic applications, with electrodes manufactured from carbon paste and terbium chelates as labeling compounds.

Abstract: The invention describes novel chemiluminescence electrode devices and their novel properties to enable achieving luminescence signal by electrical excitation by cathodic or bipolar pulses in aqueous electrolyte solutions. These devices form a significant improvement in construction of cheap and reliable means for especially diagnosis of health conditions in point-of-need purposes.

Abstract: The present invention provides a method for forming a semiconductor device, as well as a semiconductor device. The method for manufacturing a semiconductor device, among others, includes providing a gate structure (240) over a substrate (210), the gate structure (240) including a gate electrode (248) located over a nitrided gate dielectric (243), and forming a nitrided region (310) over a sidewall of the nitrided gate dielectric (243).

Abstract: The present invention provides a method for manufacturing a semiconductor device. The method, in one embodiment, includes forming a silicon oxide masking layer over a substrate in a first active region and a second active region of a semiconductor device, patterning the silicon oxide masking layer to expose the substrate in the first active region. The method further includes forming a layer of dielectric material over the substrate in the first active region, the patterned silicon oxide masking layer protecting the substrate from the layer of dielectric material in the second active region.

Abstract: The present invention provides a method for manufacturing a semiconductor device having multiple gate dielectric thickness layers. The method, in one embodiment, includes forming a masking layer over a semiconductor substrate in a first active region and a second active region of a semiconductor device, patterning the masking layer to expose the semiconductor substrate in the first active region, and subjecting exposed portions of the semiconductor substrate to a nitrogen containing plasma, thereby forming a first layer of gate dielectric material over the semiconductor substrate in the first active region.

Abstract: The present invention provides a method for manufacturing a semiconductor device having multiple gate dielectric thickness layers. The method, in one embodiment, includes forming a first layer of gate dielectric material over a semiconductor substrate in a first active region and a second active region of a semiconductor device, and patterning a masking layer to expose the first layer of gate dielectric material located in the first active region.

Abstract: A method of forming a narrow feature, such as a gate electrode (14) in an integrated circuit is disclosed. A gate layer (14) such as polycrystalline silicon is disposed near a surface of a substrate (12), and a hardmask layer (16) is formed over the gate layer (14). The hardmask layer (16) includes one or more dielectric layers (16a, 16b, 16c) such as silicon-rich silicon nitride, silicon oxynitride, and oxide. Photoresist (18) sensitive to 193 nm UV light is patterned over the hardmask layer (16) to define a feature of a first width (CD) that is reliably patterned at that wavelength. The hardmask layer (16) is then etched to clear from the surface of the gate layer (14). A timed overetch of the hardmask layer (16) reduces hardmask CD and that of the overlying photoresist (18) to the desired feature size. Etch of the gate layer is then carried out to form the desired feature.

Abstract: According to one embodiment of the invention, a method for manufacturing a transistor is provided. The method includes masking a polysilicon layer of a semiconductor device to have a dimension greater than a critical dimension of a gate to be formed. The polysilicon layer overlies a substrate layer. The method also includes incompletely etching the polysilicon layer. The method also includes forming a source region and a drain region in the substrate layer through the incompletely etched polysilicon layer by doping the substrate layer and applying heat at a first temperature. The method also includes forming a source extension and a drain extension in the substrate layer after forming the source region and the drain region by doping the substrate layer and applying heat at a second temperature.

Abstract: A method of forming a narrow feature, such as a gate electrode (14) in an integrated circuit is disclosed. A gate layer (14) such as polycrystalline silicon is disposed near a surface of a substrate (12), and a hardmask layer (16) is formed over the gate layer (14). The hardmask layer (16) includes one or more dielectric layers (16a, 16b, 16c) such as silicon-rich silicon nitride, silicon oxynitride, and oxide. Photoresist (18) sensitive to 193 nm UV light is patterned over the hardmask layer (16) to define a feature of a first width (CD) that is reliably patterned at that wavelength. The hardmask layer (16) is then etched to clear from the surface of the gate layer (14). A timed overetch of the hardmask layer (16) reduces hardmask CD and that of the overlying photoresist (18) to the desired feature size. Etch of the gate layer is then carried out to form the desired feature.

Abstract: A method for dynamically controlling a semiconductor manufacturing process for producing a semiconductor component includes performing a plurality of process segments. Each respective process segment is performed for a respective processing interval. The method includes the steps of: (a) determining a relationship among respective process intervals for at least two particular process segments of the plurality of process segments; (b) determining a first respective process interval required for a first particular process segment to effect a desired result in the semiconductor component; and (c) using the relationship to establish the respective process interval required for at least one selected particular process segment in order to fix the respective process interval for a controlled process segment other than the at least one selected particular process segment.