Patents by Inventor Tapani LAAKSONEN
Tapani LAAKSONEN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240127828Abstract: An apparatus comprising means for: obtaining values for parameters representing an audio signal, the values comprising at least one directional value and at least one energy ratio value for each sub-band of at least two sub-bands of a frame of the audio signal; determining a penalty value for each sub-band; and on a sub-band by sub-band basis: selecting a sub-band based on the penalty value; and encoding, for the selected sub-band, the at least one directional value for each sub-band; distributing any bits allocated for encoding the selected sub-band at least one directional value which are not used in the encoding of the at least one directional value to succeeding selections of sub-bands.Type: ApplicationFiled: January 29, 2021Publication date: April 18, 2024Inventors: Adriana VASILACHE, Anssi RÄMÖ, Lasse LAAKSONEN, Tapani PIHLAJAKUJA, Mikko-Ville LAITINEN
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Publication number: 20240089688Abstract: An apparatus, method and computer program is disclosed. The apparatus may comprise means for providing audio data for output to a user device, the audio data representing a virtual space comprising a plurality of sounds located at respective spatial locations within the virtual space, the plurality of sounds being respectively associated with a plurality of sound sources. The apparatus may also comprise means for detecting a predetermined gesture associated with a user identifying one of the plurality of sound sources to be a sound source of interest, determining a directional vector between a position of the user at a time of detecting the predetermined gesture and a position of the sound source of interest in the virtual space, and processing the audio data such that sounds at least in the direction of the directional vector are modified when output to the user device.Type: ApplicationFiled: January 20, 2022Publication date: March 14, 2024Inventors: Jussi Artturi LEPPÄNEN, Arto Juhani LEHTINIEMI, Lasse Juhani LAAKSONEN, Miikka Tapani VILERMO
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Publication number: 20230294190Abstract: A semiconductor processing apparatus includes a process chamber that defines an enclosure. The enclosure includes a substrate support configured to support a substrate and rotate the substrate about a central axis of the process chamber. The substrate support is also configured to move vertically along the central axis and position the substrate at multiple locations in the enclosure. The apparatus also includes one or more UV lamps configured to irradiate a top surface of the substrate supported on the substrate support.Type: ApplicationFiled: May 3, 2023Publication date: September 21, 2023Applicant: Yield Engineering Systems, Inc.Inventors: Tapani Laaksonen, M Ziaul Karim, Christopher Lane, Craig Walter McCoy, Ramakanth Alapati
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Patent number: 10908410Abstract: An apparatus includes a reflector system having a support, a reflector and a spring structure for scanning motion of the reflector in two orthogonal oscillation modes. A frequency response peaks at a natural resonant frequency with an initial bandwidth. A first transducer structure provides mechanical actuation of the reflector; a second transducer structure generates sense signals representing mechanical motion of the reflector. A feedback circuit receives from the second transducer structure a sense signal and generates to the first transducer structure a drive signal. The feedback circuit is adjusts amplitude and frequency of the drive signal to a non-linear vibration range where a frequency shift at the peak frequency is at least ten times the initial bandwidth, varies the amplitude of the drive signal in proportion to a waveform of a modulation signal, and sets frequency of the modulation signal component smaller than the frequency shift at the peak frequency.Type: GrantFiled: November 20, 2018Date of Patent: February 2, 2021Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Tapani Laaksonen, Konsta Wjuga, Mikko Pynnönen
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Patent number: 10377625Abstract: An optical device formed of a mirror wafer, a cap wafer, and a glass wafer. The mirror wafer includes a first layer of electrically conductive material, a second layer of electrically conductive material, and a third layer of electrically insulating material between the first layer and the second layer. A mirror element is formed of the second layer of the mirror wafer, and has a reflective surface in the bottom of a cavity opened into at least the first layer. A good optical quality planar glass wafer can be used to enclose the mirror element when the mirror wafer, cap wafer, and glass wafer are bonded to each other.Type: GrantFiled: April 11, 2017Date of Patent: August 13, 2019Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Altti Torkkeli, Tapani Laaksonen
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Publication number: 20190162948Abstract: An apparatus includes a reflector system having a support, a reflector and a spring structure for scanning motion of the reflector in two orthogonal oscillation modes. A frequency response peaks at a natural resonant frequency with an initial bandwidth. A first transducer structure provides mechanical actuation of the reflector; a second transducer structure generates sense signals representing mechanical motion of the reflector. A feedback circuit receives from the second transducer structure a sense signal and generates to the first transducer structure a drive signal. The feedback circuit is adjusts amplitude and frequency of the drive signal to a non-linear vibration range where a frequency shift at the peak frequency is at least ten times the initial bandwidth, varies the amplitude of the drive signal in proportion to a waveform of a modulation signal, and sets frequency of the modulation signal component smaller than the frequency shift at the peak frequency.Type: ApplicationFiled: November 20, 2018Publication date: May 30, 2019Inventors: Tapani LAAKSONEN, Konsta WJUGA, Mikko PYNNÖNEN
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Patent number: 10140169Abstract: A method and apparatus can be configured to automatically trigger a notifying event when a failure occurs. The method can also store information specifically relating to the failure. The storing is performed upon the automatic triggering of the notifying event. The specific information is stored such that the specific information persists after a system restart.Type: GrantFiled: May 22, 2013Date of Patent: November 27, 2018Assignee: NOKIA SOLUTIONS AND NETWORKS OYInventor: Heikki Jarmo Tapani Laaksonen
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Publication number: 20170297898Abstract: An optical device formed of a mirror wafer, a cap wafer, and a glass wafer. The mirror wafer includes a first layer of electrically conductive material, a second layer of electrically conductive material, and a third layer of electrically insulating material between the first layer and the second layer. A mirror element is formed of the second layer of the mirror wafer, and has a reflective surface in the bottom of a cavity opened into at least the first layer. A good optical quality planar glass wafer can be used to enclose the mirror element when the mirror wafer, cap wafer, and glass wafer are bonded to each other.Type: ApplicationFiled: April 11, 2017Publication date: October 19, 2017Inventors: Altti TORKKELI, Tapani LAAKSONEN
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Publication number: 20160092294Abstract: A method and apparatus can be configured to automatically trigger a notifying event when a failure occurs. The method can also store information specifically relating to the failure. The storing is performed upon the automatic triggering of the notifying event. The specific information is stored such that the specific information persists after a system restart.Type: ApplicationFiled: May 22, 2013Publication date: March 31, 2016Inventor: Heikki Jarmo Tapani LAAKSONEN
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Patent number: 9176092Abstract: Electrochemiluminescent technique and device suitable for cheap analytical and diagnostic applications, with electrodes manufactured from carbon paste and terbium chelates as labeling compounds.Type: GrantFiled: June 10, 2011Date of Patent: November 3, 2015Assignee: LABMASTER OYInventors: Sakari Kulmala, Timo Kalevi Korpela, Jarkko Uolevi Eskola, Johanna Suomi, Markus Hakansson, Teppo Tapani Laaksonen
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Patent number: 8920718Abstract: The invention describes novel chemiluminescence electrode devices and their novel properties to enable achieving luminescence signal by electrical excitation by cathodic or bipolar pulses in aqueous electrolyte solutions. These devices form a significant improvement in construction of cheap and reliable means for especially diagnosis of health conditions in point-of-need purposes.Type: GrantFiled: June 10, 2011Date of Patent: December 30, 2014Assignee: Labmaster OyInventors: Sakari Kulmala, Timo Kalevi Korpela, Jarkko Uolevi Eskola, Teppo Tapani Laaksonen
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Patent number: 8802577Abstract: The present invention provides a method for forming a semiconductor device, as well as a semiconductor device. The method for manufacturing a semiconductor device, among others, includes providing a gate structure (240) over a substrate (210), the gate structure (240) including a gate electrode (248) located over a nitrided gate dielectric (243), and forming a nitrided region (310) over a sidewall of the nitrided gate dielectric (243).Type: GrantFiled: May 5, 2011Date of Patent: August 12, 2014Assignee: Texas Instruments IncorporatedInventors: Hiroaki Niimi, Jarvis B. Jacobs, Reima Tapani Laaksonen
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Publication number: 20130206610Abstract: Electrochemiluminescent technique and device suitable for cheap analytical and diagnostic applications, with electrodes manufactured from carbon paste and terbium chelates as labeling compounds.Type: ApplicationFiled: June 10, 2011Publication date: August 15, 2013Applicant: LABMASTER OYInventors: Sakari Kulmala, Timo Kalevi Korpela, Jarkko Uolevi Eskola, Johanna Suomi, Markus Hakansson, Teppo Tapani Laaksonen
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Publication number: 20130199945Abstract: The invention describes novel chemiluminescence electrode devices and their novel properties to enable achieving luminescence signal by electrical excitation by cathodic or bipolar pulses in aqueous electrolyte solutions. These devices form a significant improvement in construction of cheap and reliable means for especially diagnosis of health conditions in point-of-need purposes.Type: ApplicationFiled: June 10, 2011Publication date: August 8, 2013Applicant: LABMASTER OYInventors: Sakari Kulmala, Timo Kalevi Korpela, Jarkko Uolevi Eskola, Teppo Tapani Laaksonen
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Publication number: 20120028431Abstract: The present invention provides a method for forming a semiconductor device, as well as a semiconductor device. The method for manufacturing a semiconductor device, among others, includes providing a gate structure (240) over a substrate (210), the gate structure (240) including a gate electrode (248) located over a nitrided gate dielectric (243), and forming a nitrided region (310) over a sidewall of the nitrided gate dielectric (243).Type: ApplicationFiled: May 5, 2011Publication date: February 2, 2012Applicant: TEXAS INSTRUMENTS INCORPORATEDInventors: Hiroaki Niimi, Jarvis B. Jacobs, Reima Tapani Laaksonen
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Patent number: 7799649Abstract: The present invention provides a method for manufacturing a semiconductor device. The method, in one embodiment, includes forming a silicon oxide masking layer over a substrate in a first active region and a second active region of a semiconductor device, patterning the silicon oxide masking layer to expose the substrate in the first active region. The method further includes forming a layer of dielectric material over the substrate in the first active region, the patterned silicon oxide masking layer protecting the substrate from the layer of dielectric material in the second active region.Type: GrantFiled: April 13, 2006Date of Patent: September 21, 2010Assignee: Texas Instruments IncorporatedInventors: Hiroaki Niimi, Reima Tapani Laaksonen
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Patent number: 7670913Abstract: The present invention provides a method for manufacturing a semiconductor device having multiple gate dielectric thickness layers. The method, in one embodiment, includes forming a masking layer over a semiconductor substrate in a first active region and a second active region of a semiconductor device, patterning the masking layer to expose the semiconductor substrate in the first active region, and subjecting exposed portions of the semiconductor substrate to a nitrogen containing plasma, thereby forming a first layer of gate dielectric material over the semiconductor substrate in the first active region.Type: GrantFiled: March 20, 2006Date of Patent: March 2, 2010Assignee: Texas Instruments IncorporatedInventors: Hiroaki Niimi, Reima Tapani Laaksonen
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Patent number: 7459390Abstract: The present invention provides a method for manufacturing a semiconductor device having multiple gate dielectric thickness layers. The method, in one embodiment, includes forming a first layer of gate dielectric material over a semiconductor substrate in a first active region and a second active region of a semiconductor device, and patterning a masking layer to expose the first layer of gate dielectric material located in the first active region.Type: GrantFiled: March 20, 2006Date of Patent: December 2, 2008Assignee: Texas Instruments IncorporatedInventors: Hiroaki Niimi, Reima Tapani Laaksonen
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Patent number: 6762130Abstract: A method of forming a narrow feature, such as a gate electrode (14) in an integrated circuit is disclosed. A gate layer (14) such as polycrystalline silicon is disposed near a surface of a substrate (12), and a hardmask layer (16) is formed over the gate layer (14). The hardmask layer (16) includes one or more dielectric layers (16a, 16b, 16c) such as silicon-rich silicon nitride, silicon oxynitride, and oxide. Photoresist (18) sensitive to 193 nm UV light is patterned over the hardmask layer (16) to define a feature of a first width (CD) that is reliably patterned at that wavelength. The hardmask layer (16) is then etched to clear from the surface of the gate layer (14). A timed overetch of the hardmask layer (16) reduces hardmask CD and that of the overlying photoresist (18) to the desired feature size. Etch of the gate layer is then carried out to form the desired feature.Type: GrantFiled: May 31, 2002Date of Patent: July 13, 2004Assignee: Texas Instruments IncorporatedInventors: Reima Tapani Laaksonen, Jarvis B. Jacobs
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Patent number: 6737325Abstract: According to one embodiment of the invention, a method for manufacturing a transistor is provided. The method includes masking a polysilicon layer of a semiconductor device to have a dimension greater than a critical dimension of a gate to be formed. The polysilicon layer overlies a substrate layer. The method also includes incompletely etching the polysilicon layer. The method also includes forming a source region and a drain region in the substrate layer through the incompletely etched polysilicon layer by doping the substrate layer and applying heat at a first temperature. The method also includes forming a source extension and a drain extension in the substrate layer after forming the source region and the drain region by doping the substrate layer and applying heat at a second temperature.Type: GrantFiled: March 6, 2003Date of Patent: May 18, 2004Assignee: Texas Instruments IncorporatedInventors: Manoj Mehrotra, Reima Tapani Laaksonen