Patents by Inventor Tarik Rostum

Tarik Rostum has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12360871
    Abstract: A device may generate a link training and status state machine (LTSSM) test configuration that includes states and paths connecting the states, and may provide the LTSSM test configuration for tracing through by a device under test. The device may receive results associated with tracing through of the LTSSM test configuration by the device under test, and may modify, based on the results, one of the paths of the LTSSM test configuration to include a different one of the states and to generate a modified LTSSM test configuration. The device may provide the modified LTSSM test configuration for tracing through by the device under test.
    Type: Grant
    Filed: December 14, 2023
    Date of Patent: July 15, 2025
    Assignee: VIAVI Solutions Inc.
    Inventors: Tarik Rostum, Marc Werz
  • Publication number: 20240202088
    Abstract: A device may generate a link training and status state machine (LTSSM) test configuration that includes states and paths connecting the states, and may provide the LTSSM test configuration for tracing through by a device under test. The device may receive results associated with tracing through of the LTSSM test configuration by the device under test, and may modify, based on the results, one of the paths of the LTSSM test configuration to include a different one of the states and to generate a modified LTSSM test configuration. The device may provide the modified LTSSM test configuration for tracing through by the device under test.
    Type: Application
    Filed: December 14, 2023
    Publication date: June 20, 2024
    Inventors: Tarik ROSTUM, Marc WERZ
  • Publication number: 20090063889
    Abstract: The lane skew alignment device of the present invention facilitates the use of the SFI-5 standard interface in an FPGA without the need to rely on feedback signals from a remote device. The delay between lanes is determined using a D-Flip Flop or other type of phase comparator. To minimize the components needed to physically implement the solution a cross-point switch is used to select one of the parallel lanes at a time to be compared to a reference lane, over which the same test signal is transmitted.
    Type: Application
    Filed: May 23, 2008
    Publication date: March 5, 2009
    Inventors: Faisal DADA, Tarik Rostum, Marius Lucian Draghia, Eugen Vlaicu