Abstract: In one example, a display device includes a reception circuit that receives pieces of first, second, and third image data in order. The piece of first image data has pixel values for a first resolution, the piece of second image data has pixel values for a second resolution higher than the first resolution, and the piece of third image data has pixel values included an entire image. A display section includes first, second, and third sets of pixels, and a display drive circuit performs first, second, and third driving for the first, second and third sets of pixels.

Abstract: A display device according to the present disclosure includes: a reception circuit that is configured to receive a piece of first image data, a piece of second image data, and a piece of third image data, the piece of first image data representing an entire image having a first resolution, the piece of second image data representing a peripheral image having a second resolution less than or equal to the first resolution, the peripheral image including an image outside the entire image, the piece of third image data representing a first partial image having a third resolution higher than the first resolution, the first partial image including an image having an image range narrower than an image range of the entire image; a display section that includes a plurality of pixels, and is configured to display an image having a same image range as the image range of the entire image; a first sensor that is configured to detect a change in orientation of the display device; an image processing circuit that is configu

Abstract: The object of the present invention is to suppress power consumption. A display device includes: a first holding unit provided in a pixel and configured to hold an image signal; and a PWM signal generation unit provided in the pixel and configured to generate a pulse width modulation (PWM) signal corresponding to the image signal on the basis of the image signal and count signal held in the first holding unit.

Abstract: A display device according to the present disclosure includes: a reception circuit that is configured to receive a piece of first image data and a piece of second image data, the piece of first image data representing an entire image having a first resolution, the piece of second image data representing a first partial image having a second resolution higher than the first resolution, and the first partial image corresponding to a portion of the entire image; a display section including a plurality of pixels; and a display drive circuit that is configured to perform first driving and second driving, the first driving in which the plurality of pixels is driven in units of a first number of pixels on the basis of the piece of first image data, the second driving in which two or more pixels provided in a region corresponding to the first partial image of the plurality of pixels are driven in units of a second number of pixels on the basis of the piece of second image data, and the second number being smaller tha

Abstract: An image processing device includes a decompression unit configured to decompress a compressed image signal, a gradation-dependent correction unit configured to perform gradation-dependent correction on the decompressed image signal, the gradation-dependent correction being a correction process in which the amount of correction varies among luminance gradations, and a compression error correction unit configured to perform compression error correction in which input luminance values are selectively offset, on the decompressed image signal which has yet to be subjected to the gradation-dependent correction.

Abstract: An image processing device includes a decompression unit configured to decompress a compressed image signal, a gradation-dependent correction unit configured to perform gradation-dependent correction on the decompressed image signal, the gradation-dependent correction being a correction process in which the amount of correction varies among luminance gradations, and a compression error correction unit configured to perform compression error correction in which input luminance values are selectively offset, on the decompressed image signal which has yet to be subjected to the gradation-dependent correction.

Abstract: A driver IC includes: a plurality of driver circuits that are individually provided for respective light modulation elements and drive the light modulation elements, in which the light modulation elements each perform light modulation on received light in response to an applied voltage; and a plurality of output terminals outputting signals derived from the respective driver circuits to outside. The driver IC is a single driver IC that drives the light modulation elements. The output terminals are disposed on sides of the driver IC, and the respective output terminals are disposed on the different sides for the respective corresponding driver circuits.

Abstract: A signal processing apparatus includes a representative value calculation unit and a low pass component extraction value calculation unit. The representative value calculation unit is configured to calculate, when areas obtained by dividing a frame image in units of a plurality of pixels are each assumed as a block, an average value of pixel values within each block as a representative value of the block based on an input video signal. The low pass component extraction value calculation unit is configured to perform spline interpolation using the representative values of the blocks located near a pixel being a calculation target for a low pass component extraction value, to calculate the low pass component extraction value of the calculation target.

Abstract: There is provided a driving circuit driving pixels in a display, the pixels each including a liquid crystal cell and a memory. The driving circuit includes: a dividing section dividing one frame period into subfields, the subfields corresponding to respective bits of gray-scale data and having period lengths commensurate with weights of the corresponding bits; a correction section correcting, when bit sequences of two sets of gray-scale data corresponding to two pixels adjacent to each other differ from each other, gray-scale data having a higher gray-scale level out of the two set of gray-scale data, to further increase the gray-scale level thereof; and an ON-OFF period control section controlling a ratio of an ON period or an OFF period to one frame period by bringing the liquid crystal cell of the pixel into an on state or an off state according to a corresponding bit in each of the subfields.