Patents by Inventor Taro Kanao

Taro Kanao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240022236
    Abstract: According to one embodiment, an electronic circuit includes a band-pass filter, first circuits, a first port, and a second port. The band-pass filter includes filter resonators. Two adjacent filter resonators included in the filter resonators are mutually couplable. Each of the first circuits includes a first qubit and a first readout resonator. The first readout resonator is couplable with the first qubit. One of the filter resonators is couplable with the first readout resonator of one of the first circuits. Another one of the filter resonators is couplable with the first readout resonator of another one of the first circuits. The filter resonators include first, second, and third filter resonators. The first filter resonator is couplable with the first port. The second filter resonator is couplable with the second port. The third filter resonator is between the first filter resonator and the second filter resonator.
    Type: Application
    Filed: February 21, 2023
    Publication date: January 18, 2024
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Noritsugu SHIOKAWA, Tamio KAWAGUCHI, Hayato GOTO, Taro KANAO, Yinghao HO
  • Publication number: 20240022235
    Abstract: According to one embodiment, an electronic circuit includes a band-pass filter, and at least one first circuit. The band-pass filter includes a plurality of filter resonators. Two adjacent filter resonators included in the filter resonators are mutually couplable. The first circuit includes a first qubit and a first readout resonator. The first readout resonator is couplable with the first qubit and one of the filter resonators. A passband of the band-pass filter includes a first passband and a second passband. A magnitude of a first ripple of the first passband is not more than 1/10 of a magnitude of a second ripple of the second passband.
    Type: Application
    Filed: February 14, 2023
    Publication date: January 18, 2024
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tamio KAWAGUCHI, Noritsugu SHIOKAWA, Hayato GOTO, Taro KANAO, Yinghao HO
  • Patent number: 11836458
    Abstract: According to one embodiment, a calculating device includes nonlinear oscillators, connectors, and a controller. One of the connectors connects at least two of the nonlinear oscillators. The nonlinear oscillators include first and second nonlinear oscillators. The first nonlinear oscillator includes a first circuit part and a first conductive member. The first circuit part includes first and second Josephson junctions. The second nonlinear oscillator includes a second circuit part and a second conductive member. The second circuit part includes third and fourth Josephson junctions. Numbers of the connectors connected to the first and second connectors are first and second numbers, respectively. The second number is greater than the first number. The controller performs at least a first operation of supplying a first signal to the first conductive member and supplying a second signal to the second conductive member. The second signal is different from the first signal.
    Type: Grant
    Filed: September 4, 2020
    Date of Patent: December 5, 2023
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Taro Kanao, Hayato Goto
  • Publication number: 20230281267
    Abstract: According to one embodiment, a calculation device includes a processing device configured to perform a processing procedure. The processing procedure includes a first update of a first vector, a second update of a second vector, and a third update of a third vector. The first update includes updating the first vector using the second vector and the third vector. The second update includes updating the second vector using the first vector. The processing device is configured to output an output of at least one of the first vector obtained after repeating the processing procedure or a function of the first vector obtained after the repeating the processing procedure.
    Type: Application
    Filed: August 10, 2022
    Publication date: September 7, 2023
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yoshisato SAKAI, Hayato GOTO, Taro KANAO
  • Publication number: 20230281268
    Abstract: According to one embodiment, a calculation device includes a processing device configured to perform a processing procedure. The processing procedure includes a first update of a first vector, a second update of a second vector, and a third update of a third vector. The first update includes updating the first vector using the second vector and the third vector. The second update includes updating the second vector using the first vector. The processing device is configured to output at least one of the first vector obtained after repeating the processing procedure or a function of the first vector obtained after the repeating the processing procedure.
    Type: Application
    Filed: August 11, 2022
    Publication date: September 7, 2023
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yoshisato SAKAI, Hayato GOTO, Taro KANAO
  • Patent number: 11741187
    Abstract: A calculation device includes a memory and one or more processors coupled to the memory and configured to alternately update, for elements each associated with first and second variables, the first and second variables, sequentially for unit times from an initial time to an end time. In an updating process for each unit time, the one or more processors are configured to: update, for each of the elements, the first variable based on the second variable; when the first variable is smaller than a first value, change the first variable to the first value and change the second variable to a third value; when the first variable is greater than a second value, change the first variable to the second value and change the second variable to the third value; and add an acceleration value calculated by a predetermined computation to the second variable.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: August 29, 2023
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Taro Kanao, Hayato Goto, Ryo Hidaka, Kosuke Tatsumura
  • Patent number: 11593689
    Abstract: According to one embodiment, a calculating device includes a processor repeating a processing procedure. The processing procedure includes first, second, and third variable updates. The first variable update includes updating an ith entry of a first variable xi by adding an ith entry of a first function to the first variable xi. The second variable update includes updating the second variable yi by adding, to the second variable yi, an arithmetic result of an ith entry of a second function, an ith entry of a third function, and an ith entry of a first element function. The third variable update includes updating the third variable z by adding an ith entry of a second element function to the third variable z. The processor performs at least an output of at least one of the first variable xi or a function of the first variable xi.
    Type: Grant
    Filed: March 1, 2019
    Date of Patent: February 28, 2023
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Taro Kanao, Hayato Goto, Kosuke Tatsumura
  • Publication number: 20230059903
    Abstract: According to one embodiment, an electronic circuit includes an element part. The element part includes a first resonator and a second resonator. The first resonator includes a first conductive layer, a second conductive layer, a first current path including a first Josephson junction, and a second current path including a second Josephson junction. The first current path includes a first end portion and a second end portion. The first end portion is connected with the first conductive layer. The second end portion is connected with the second conductive layer. The second current path includes a third end portion and a fourth end portion. The third end portion is connected with the first conductive layer. The fourth end portion is connected with the second conductive layer. The second resonator is configured to be electromagnetically coupled with the first resonator.
    Type: Application
    Filed: February 22, 2022
    Publication date: February 23, 2023
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Noritsugu Shiokawa, Hayato Goto, Taro Kanao
  • Patent number: 11531523
    Abstract: According to one embodiment, a calculating device includes a nonlinear oscillator. The nonlinear oscillator includes a circuit part including a first Josephson junction and a second Josephson junction, and a conductive member including a first terminal. An electrical signal is input to the first terminal. The electrical signal includes a first signal in a first operation. The first signal includes a first frequency component having a first frequency, and a second frequency component having a second frequency. The first frequency is 2 times an oscillation frequency of the nonlinear oscillator. An absolute value of a difference between the first frequency and the second frequency is not more than 0.3 times the first frequency.
    Type: Grant
    Filed: August 12, 2021
    Date of Patent: December 20, 2022
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Taro Kanao, Hayato Goto
  • Publication number: 20220283780
    Abstract: According to an embodiment, a calculation device includes a memory and one or more processors coupled to the memory and configured to alternately update, for elements each associated with first and second variables, the first and second variables, sequentially for unit times from an initial time to an end time. In an updating process for each unit time, the one or more processors are configured to: update, for each of the elements, the first variable based on the second variable; when the first variable is smaller than a first value, change the first variable to the first value and change the second variable to a third value; when the first variable is greater than a second value, change the first variable to the second value and change the second variable to the third value; and add an acceleration value calculated by a predetermined computation to the second variable.
    Type: Application
    Filed: August 30, 2021
    Publication date: September 8, 2022
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Taro KANAO, Hayato GOTO, Ryo HIDAKA, Kosuke TATSUMURA
  • Publication number: 20220236947
    Abstract: According to one embodiment, a calculating device includes a nonlinear oscillator. The nonlinear oscillator includes a circuit part including a first Josephson junction and a second Josephson junction, and a conductive member including a first terminal. An electrical signal is input to the first terminal. The electrical signal includes a first signal in a first operation. The first signal includes a first frequency component having a first frequency, and a second frequency component having a second frequency. The first frequency is 2 times an oscillation frequency of the nonlinear oscillator. An absolute value of a difference between the first frequency and the second frequency is not more than 0.3 times the first frequency.
    Type: Application
    Filed: August 12, 2021
    Publication date: July 28, 2022
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Taro KANAO, Hayato GOTO
  • Patent number: 11256779
    Abstract: A calculation apparatus according to an embodiment includes one or more processing circuits configured to function as an interaction unit, a first addition unit, and a time evolution unit. The interaction unit generates N first intermediate variables obtained by performing a matrix computing on the N first variables and the coefficient matrix at the first time. The first addition unit calculates N second variables at the second time at which the sampling period elapses from the first time. The time evolution unit executes a time evolution process on the N second variables at the first time to generate N first variables at the second time. If the N first variables at the second time unsatisfied a predetermined constraint condition, the time evolution unit changes the N second variables at the second time in a direction of satisfying the constraint condition.
    Type: Grant
    Filed: February 26, 2020
    Date of Patent: February 22, 2022
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Taro Kanao, Kosuke Tatsumura, Hayato Goto
  • Patent number: 11170069
    Abstract: According to one embodiment, a calculating device includes a processor. The processor acquires a data set {s} and repeats a processing procedure. The processing procedure includes first and second variable updates. The first variable update includes updating an ith entry of a first variable xi by adding a first function to the ith entry of the first variable xi. The ith entry of the first variable xi is one of a first variable set {x}. A variable of the first function includes at least a part of a second variable set {y}. The second variable update includes updating an ith entry of a second variable yi by adding a second function and a third function to the ith entry of the second variable yi. The ith entry of the second variable yi is one of the second variable set {y}. The processor outputs at least a fourth function.
    Type: Grant
    Filed: March 12, 2019
    Date of Patent: November 9, 2021
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Taro Kanao, Hayato Goto, Kosuke Tatsumura
  • Publication number: 20210263705
    Abstract: According to one embodiment, a calculating device includes nonlinear oscillators, connectors, and a controller. One of the connectors connects at least two of the nonlinear oscillators. The nonlinear oscillators include first and second nonlinear oscillators. The first nonlinear oscillator includes a first circuit part and a first conductive member. The first circuit part includes first and second Josephson junctions. The second nonlinear oscillator includes a second circuit part and a second conductive member. The second circuit part includes third and fourth Josephson junctions. Numbers of the connectors connected to the first and second connectors are first and second numbers, respectively. The second number is greater than the first number. The controller performs at least a first operation of supplying a first signal to the first conductive member and supplying a second signal to the second conductive member. The second signal is different from the first signal.
    Type: Application
    Filed: September 4, 2020
    Publication date: August 26, 2021
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Taro KANAO, Hayato GOTO
  • Patent number: 11003734
    Abstract: According to one embodiment, a calculating device includes a processor repeating a processing procedure. The processing procedure includes a first variable update and a second variable update. The first variable update includes updating a first variable xi by adding a first function to the first variable xi before the first variable update. The second variable update includes updating the second variable yi by adding a second function and a third function to the second variable yi before the second variable update. A variable of the first function set includes a calculation parameter. The calculation parameter is different before and after the processing procedure. The processor performs at least an output of at least one of the first variable xi obtained after the repeating of the processing procedure or a function of the first variable xi obtained after the repeating of the processing procedure.
    Type: Grant
    Filed: February 22, 2019
    Date of Patent: May 11, 2021
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hayato Goto, Taro Kanao, Kosuke Tatsumura
  • Publication number: 20210073319
    Abstract: A calculation apparatus according to an embodiment includes one or more processing circuits configured to function as an interaction unit, a first addition unit, and a time evolution unit. The interaction unit generates N first intermediate variables obtained by performing a matrix computing on the N first variables and the coefficient matrix at the first time. The first addition unit calculates N second variables at the second time at which the sampling period elapses from the first time. The time evolution unit executes a time evolution process on the N second variables at the first time to generate N first variables at the second time. If the N first variables at the second time unsatisfied a predetermined constraint condition, the time evolution unit changes the N second variables at the second time in a direction of satisfying the constraint condition.
    Type: Application
    Filed: February 26, 2020
    Publication date: March 11, 2021
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Taro KANAO, Kosuke TATSUMURA, Hayato GOTO
  • Publication number: 20200089727
    Abstract: According to one embodiment, a calculating device includes a processor. The processor acquires a data set {s} and repeats a processing procedure. The processing procedure includes first and second variable updates. The first variable update includes updating an ith entry of a first variable xi by adding a first function to the ith entry of the first variable xi. The ith entry of the first variable xi is one of a first variable set {x}. A variable of the first function includes at least a part of a second variable set {y}. The second variable update includes updating an ith entry of a second variable yi by adding a second function and a third function to the ith entry of the second variable yi. The ith entry of the second variable yi is one of the second variable set {y}. The processor outputs at least a fourth function.
    Type: Application
    Filed: March 12, 2019
    Publication date: March 19, 2020
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Taro KANAO, Hayato GOTO, Kosuke TATSUMURA
  • Publication number: 20200090066
    Abstract: According to one embodiment, a calculating device includes a processor repeating a processing procedure. The processing procedure includes first, second, and third variable updates. The first variable update includes updating an ith entry of a first variable xi by adding an ith entry of a first function to the first variable xi. The second variable update includes updating the second variable yi by adding, to the second variable yi, an arithmetic result of an ith entry of a second function, an ith entry of a third function, and an ith entry of a first element function. The third variable update includes updating the third variable z by adding an ith entry of a second element function to the third variable z. The processor performs at least an output of at least one of the first variable xi or a function of the first variable xi.
    Type: Application
    Filed: March 1, 2019
    Publication date: March 19, 2020
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Taro KANAO, Hayato GOTO, Kosuke TATSUMURA
  • Publication number: 20200089473
    Abstract: According to one embodiment, a calculating device includes a processor repeating a processing procedure. The processing procedure includes a first variable update and a second variable update. The first variable update includes updating a first variable xi by adding a first function to the first variable xi before the first variable update. The second variable update includes updating the second variable yi by adding a second function and a third function to the second variable yi before the second variable update. A variable of the first function set includes a calculation parameter. The calculation parameter is different before and after the processing procedure. The processor performs at least an output of at least one of the first variable xi obtained after the repeating of the processing procedure or a function of the first variable xi obtained after the repeating of the processing procedure.
    Type: Application
    Filed: February 22, 2019
    Publication date: March 19, 2020
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hayato GOTO, Taro KANAO, Kosuke TATSUMURA
  • Patent number: 10522172
    Abstract: According to one embodiment, an oscillator includes a first element. The first element includes first and second magnetic layers, and a first nonmagnetic layer. The first magnetic layer includes first and second magnetic films, and a first nonmagnetic film. The second magnetic film is provided between the second magnetic layer and the first magnetic film. The first nonmagnetic layer is provided between the second magnetic film and the second magnetic layer. An orientation of a first magnetization of the first magnetic film has a reverse component of an orientation of a second magnetization of the second magnetic film. A first magnetic field is applied to the first element. The first element is in a first state when a first current flows in the first element. An electrical resistance of the first element in the first state includes first and second electrical resistances repeating alternately.
    Type: Grant
    Filed: March 15, 2018
    Date of Patent: December 31, 2019
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tazumi Nagasawa, Hirofumi Suto, Michinaga Yamagishi, Taro Kanao, Koichi Mizushima