Abstract: A semiconductor is disclosed that may include: a first drift region; a base region arranged on the first semiconductor layer; a source region arranged on the base region; a main electrode electrically connected to the source region; and a gate electrode structure that penetrates the source region and base region and reaches the first drift region, wherein the gate electrode structure comprises: a gate electrode; and an insulating material that insulates the gate electrode from the first drift region and the base region; and a field plate structure reaching the first drift region deeper than the gate electrode structure, wherein the field plate structure comprises: a field plate; a resistive part that electrically connects the main electrode to the field plate; and an insulating material that insulates the field plate and the resistive part section from the first drift region and the base region.

Abstract: A data management system comprises: an outsourcer terminal outsourcing a fabrication by an instruction document; an outsourcee terminal receiving outsourcing and/or sub-outsourcing; and a server device. The server device comprises: a data management unit managing a proprietary authority of data stored in a data storage unit; an order container storage unit storing an order container with which data stored in the data storage unit is correlated, for each order created in an order creation unit of the outsourcer terminal and/or the outsourcee terminal; and an order container management unit managing sharing of the order container, based on an instruction from an order container sharing authority management unit of the outsourcer terminal and/or the outsourcee terminal. The server device, for each order, correlates any format of data element stored with the order container, for management.

Abstract: A display system includes: an image acquisition unit that acquires each of a first image of a work site imaged by a first camera and a second image of the work site imaged by a second camera; a viewpoint position calculation unit that calculates a viewpoint position of worker; a luminance adjustment unit that adjusts luminance of at least one of the first image and the second image based on the viewpoint position; and a display control unit that combines the first image and the second image having the luminance adjusted and causes a display device to display the combined image.

Abstract: In general, according to one embodiment, a recycling method is provided. The method includes dispersing an electrode containing a niobium titanium oxide in water; separating the niobium titanium oxide from the electrode dispersed in the water; and applying a first heat treatment to the separated niobium titanium oxide.

Abstract: A semiconductor device according to one or more embodiments may include a first semiconductor region, a second semiconductor region arranged on the first semiconductor region, a third semiconductor region arranged on the second semiconductor region, a first trench penetrating the second semiconductor region from the third semiconductor region and reaching the first semiconductor region, a first main electrode arranged on the second semiconductor region via a first insulating film, field electrodes arranged via second insulating films in a second trenches that are deeper than the first trench and reach the first semiconductor region. The first main electrode may be arranged between the field electrodes. The field electrodes may be arranged alternately, and the field electrodes that are alternately adjacent to each other may be arranged so that the field electrodes partially overlap with adjacent field electrodes in an alignment direction of the arranging field electrodes in a plan view.

Abstract: A semiconductor is disclosed that may include: a first drift region; a base region arranged on the first semiconductor layer; a source region arranged on the base region; a main electrode electrically connected to the source region; and a gate electrode structure that penetrates the source region and base region and reaches the first drift region, wherein the gate electrode structure comprises: a gate electrode; and an insulating material that insulates the gate electrode from the first drift region and the base region; and a field plate structure reaching the first drift region deeper than the gate electrode structure, wherein the field plate structure comprises: a field plate; a resistive part that electrically connects the main electrode to the field plate; and an insulating material that insulates the field plate and the resistive part section from the first drift region and the base region.

Abstract: A semiconductor device is disclosed that includes a group of trenches positioned in active region inside a first semiconductor region. A first trench is positioned in an outer peripheral region on an outer side of an active region. A second trench is positioned on an outer side of the first trench positioned in the outer peripheral region on the outer side of the active region. A mesa portion is positioned between the first and the second trenches. An insulating layer is positioned inside the first and second trenches. A second field plate is positioned inside the insulating layer in the first trench. A third field plate positioned inside the second insulating layer in the second trench. The mesa portion includes the semiconductor region electrically coupled to the first main electrode on an outermost side. The first trench does not have the gate electrode at upper part of the first trench.

Abstract: A semiconductor device is disclosed that includes a group of trenches positioned in active region inside a first semiconductor region. A first trench is positioned in an outer peripheral region on an outer side of an active region. A second trench is positioned on an outer side of the first trench positioned in the outer peripheral region on the outer side of the active region. A mesa portion is positioned between the first and the second trenches. An insulating layer is positioned inside the first and second trenches. A second field plate is positioned inside the insulating layer in the first trench. A third field plate positioned inside the second insulating layer in the second trench. The mesa portion includes the semiconductor region electrically coupled to the first main electrode on an outermost side. The first trench does not have the gate electrode at upper part of the first trench.

Abstract: A semiconductor device is disclosed including a sub-layer with first conductivity type, a drift layer with first conductivity type, a base region with second conductivity type positioned on the drift layer, a source region in contact with the base region, a source electrode, a plurality of trenches, at least one of the trenches in contact with the drift layer, the base region, and the source region, a plurality of insulating regions, at least one of the insulating regions positioned inside of each trench, a plurality of gate electrodes, at least one of the gate electrodes positioned inside of each trench; and a plurality of field plates, at least one of the field plates electrically connected to the source electrode and positioned in the insulating region in the trench. The field plate comprises high-resistance polysilicon.

Abstract: A semiconductor device is disclosed including a sub-layer with first conductivity type, a drift layer with first conductivity type, a base region with second conductivity type positioned on the drift layer, a source region in contact with the base region, a source electrode, a plurality of trenches, at least one of the trenches in contact with the drift layer, the base region, and the source region, a plurality of insulating regions, at least one of the insulating regions positioned inside of each trench, a plurality of gate electrodes, at least one of the gate electrodes positioned inside of each trench; and a plurality of field plates, at least one of the field plates electrically connected to the source electrode and positioned in the insulating region in the trench. The field plate comprises high-resistance polysilicon.

Abstract: A semiconductor device includes: a semiconductor base; a trench insulating film which is provided on the inner wall surface of a trench formed from the upper surface of the semiconductor base in a film thickness direction of the semiconductor base and including a charged region which is charged positively; and a gate electrode provided on the trench insulating film within the trench. The positive charge density of the charged region at least in a side part of an outer region of the trench insulating film which is provided on the side surface of the trench is higher than that of an inner region of the trench insulating film which is opposite to the outer region, the outer region being in contact with the semiconductor base.

Abstract: A semiconductor device includes: a semiconductor base 10 in which a first trench 101 is formed in a mesh-like shape in a plan view and a second trench 102 is formed in a mesh opening surrounded by the first trench 101; a first semiconductor element 1 which is formed in the semiconductor base 10 and includes a first gate electrode 81 provided within the first trench 101; and a second semiconductor element 2 which is formed in the semiconductor base 10 and includes a second gate electrode 82 provided within the second trench 102 surrounded by the first gate electrode 81.

Abstract: A semiconductor device in embodiments, may include a device region having: two active trenches, each having at least a gate electrode. Two insulated trenches each having an electrode may be formed between the two active trenches separated by a junction. First p-doped layers may be provided between a first active trench and a first insulated trench, and between a second active trenches and a second insulated trench. Second p-doped layers may be provided between a first insulated trench and a second insulated trench with the junction arranged therebetween. The second p-doped layers may be provided on an external surface of the respective first one and second one of the two insulated trenches at a depth and a thickness set to form a current path when the power semiconductor device is in an OFF state.

Abstract: A semiconductor device includes: a semiconductor base; a trench insulating film 50 which is provided on the inner wall surface of a trench formed from the upper surface of the semiconductor base in the film thickness direction and includes a charged region which is charged positively; and a gate electrode 80 provided on the trench insulating film 50 within the trench. The positive charge density of the charged region at least in a side part of an outer region of the trench insulating film 50 which is provided on the side surface of the trench is higher than that of an inner region of the trench insulating film which is opposite to the outer region, the outer region being in contact with the semiconductor base.

Abstract: A semiconductor device includes: a semiconductor base 10 in which a first trench 101 is formed in a mesh-like shape in a plan view and a second trench 102 is formed in a mesh opening surrounded by the first trench 101; a first semiconductor element 1 which is formed in the semiconductor base 10 and includes a first gate electrode 81 provided within the first trench 101; and a second semiconductor element 2 which is formed in the semiconductor base 10 and includes a second gate electrode 82 provided within the second trench 102 surrounded by the first gate electrode 81.

Abstract: A semiconductor device may comprise a substrate; a trench formed in the substrate and filled with an insulating layer; and a gate electrode and a source embedded in the insulating layer. The gate electrode and the source electrode may be positioned in the insulating layer in the trench above and below each other. From a cross-sectional perspective, the gate electrode and the source electrode are not overlapped in horizontal or vertical direction. The trench may extend to a first depth of a bottom surface of the trench below the gate electrode, and may extend to a second depth of the bottom surface of the trench below the source electrode. The first depth and the second depth may be different.

Abstract: A semiconductor device according to one or more embodiments may include: a drain region; a drift region positioned above the drain region; a base region positioned on the drift region; a trench positioned to abut the base region and the drift region; an insulating in the trench; a counter electrode embedded in the insulating film; a gate electrode positioned above the counter electrode and that is embedded in the insulating film; and a source region that abuts the base region and the trench, wherein a thickness of the insulating film between the gate electrode and an interface between the drift region and the base region is larger than a thickness of the insulating film between the gate electrode and an interface between the source region and the base region.

Abstract: A semiconductor device may include a device region having one or more active trenches, a field termination region having an edge trench. A depth of the edge trench is larger than a depth of the one or more active trenches. A thickness of an insulation layer in the edge trench is larger than a thickness of an insulation layer in the one or more active trenches. In some embodiments, the first depth is from 1.2 to 2.0 times larger than the second depth, and a first width of the edge trench is 1.5 to 4.0 times larger than a second width of the one or more active trenches. In a cross-sectional view, a gate electrode of the edge trench is laterally offset from the source electrode in a depth direction of the edge trench such that the gate electrode and the source electrode do not overlap.

Abstract: A semiconductor device has a through hole penetrating a substrate, an insulating film filling the through hole, a gate electrode and a source electrode. The through hole penetrates a substrate on a first side. A first gate electrode may be embedded in the insulating film. A first source electrode may be embedded in the insulating film deeper than the first gate electrode. A first width of the first opening may be larger than a second width of an internal portion of the through hole. A ratio may be established between the first width and the second width. A second source electrode may be embedded in the insulating film deeper than the first source electrode. A second gate electrode may be embedded deeper than the second source electrode in a vertical direction within the through hole. The first opening and the second opening may be laterally offset.

Abstract: A semiconductor device may comprise a substrate; a trench formed in the substrate and filled with an insulating layer; and a gate electrode and a source embedded in the insulating layer. The gate electrode and the source electrode may be positioned in the insulating layer in the trench above and below each other. From a cross-sectional perspective, the gate electrode and the source electrode are not overlapped in horizontal or vertical direction. The trench may extend to a first depth of a bottom surface of the trench below the gate electrode, and may extend to a second depth of the bottom surface of the trench below the source electrode. The first depth and the second depth may be different.