Patents by Inventor Taro Usami

Taro Usami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12211729
    Abstract: A member for a semiconductor manufacturing apparatus includes: a ceramic plate that has a wafer placement surface at an upper surface thereof; a plug disposition hole that extends through the ceramic plate in an up-down direction and that has a truncated conical space whose upper opening is larger than a lower opening thereof; a truncated conical plug that is disposed in the plug disposition hole, that allows gas to flow in the up-down direction, and whose upper surface is larger than a lower surface thereof; an adhesive layer that is provided between the plug disposition hole and the truncated conical plug; an electrically conductive baseplate that is joined to a lower surface of the ceramic plate through a joint layer; and a gas supply path that is provided in the baseplate and the joint layer and that supplies gas to the truncated conical plug.
    Type: Grant
    Filed: July 5, 2023
    Date of Patent: January 28, 2025
    Assignee: NGK INSULATORS, LTD.
    Inventors: Natsuki Hirata, Shinya Yoshida, Tatsuya Kuno, Seiya Inoue, Taro Usami, Kenji Yonemoto, Aoi Saito
  • Publication number: 20240412998
    Abstract: A wafer placement table includes: a ceramic plate having a wafer placement surface on its upper surface; a cooling plate provided on a lower surface of the ceramic plate; and a refrigerant flow path provided inside the cooling plate, wherein the refrigerant flow path includes a first portion and a second portion, the second portion continuing from the first portion and being divided into two or more ways forming branches that run side by side, and wherein the first portion has a cross-sectional area smaller than a sum of cross-sectional areas of the respective branches included in the second portion.
    Type: Application
    Filed: February 20, 2024
    Publication date: December 12, 2024
    Applicant: NGK INSULATORS, LTD.
    Inventors: Taro USAMI, Yohei KAJIURA, Keita IKEGAMI
  • Publication number: 20240395511
    Abstract: A wafer placement table includes a ceramic plate having a wafer placement surface on an upper surface, and a cooling plate provided on a lower surface of the ceramic plate. The cooling plate is made of a material having a lower thermal conductivity than Al. A length between an upper surface of a refrigerant flow path and the wafer placement surface is not constant and varies as being long in one part and short in another part. A flow-path cross-sectional area of the refrigerant flow path is not constant and varies as being small in one part and large in another part. An aspect ratio defined as a ratio of a vertical length to a horizontal length of a flow-path cross section of the refrigerant flow path is not constant and varies as being small in one part and large in another part.
    Type: Application
    Filed: February 14, 2024
    Publication date: November 28, 2024
    Applicant: NGK INSULATORS, LTD.
    Inventors: Taro USAMI, Yohei KAJIURA
  • Publication number: 20240364241
    Abstract: A feeder member is used to supply electricity to an electrode embedded in a ceramic base. The feeder member includes an electrode-side terminal that is made of a high-melting-point metal containing material and joined to the electrode, an intermediate member that is made of a Cu containing material and directly joined to the electrode-side terminal without using a brazing material, a cable support member that is made of a Cu containing material and joined to the intermediate member, and a cable that is made of a Cu containing material and that has one end whose end surface is welded to the cable support member.
    Type: Application
    Filed: November 20, 2023
    Publication date: October 31, 2024
    Applicant: NGK INSULATORS, LTD.
    Inventors: Taro USAMI, Seiya INOUE, Tatsuya KUNO, Tomoyuki MINAMI
  • Publication number: 20240355656
    Abstract: A wafer placement table includes: a ceramic plate having a wafer placement surface, a cooling plate having a refrigerant flow path and being provided on a lower surface-side of the ceramic plate; a first ceramic plate penetration section that reaches the wafer placement surface; a second ceramic plate penetration section that reaches the wafer placement surface; a first gas passage that communicates with the first ceramic plate penetration section; and a second gas passage that communicates with the second ceramic plate penetration section. The first gas passage has a first gas intermediate passage, the second gas passage has a second gas intermediate passage, the second gas intermediate passage is provided above the first gas intermediate passage, and the refrigerant flow path has a first flow path section provided above the first gas intermediate passage, and a second flow path section provided below the second gas intermediate passage.
    Type: Application
    Filed: September 28, 2023
    Publication date: October 24, 2024
    Applicant: NGK INSULATORS, LTD.
    Inventors: Tatsuya KUNO, Taro USAMI
  • Publication number: 20240297062
    Abstract: A wafer placement table includes a ceramic plate having a wafer placement surface on its top surface and incorporating an electrode; an electrically conductive plate joined to a bottom surface of the ceramic plate; a ceramic plate penetrating part extending through the ceramic plate; an electrically insulating gas passage plug provided in the ceramic plate penetrating part and that allows gas to pass inside; a gas introduction passage provided at least inside the electrically conductive plate and communicating with the ceramic plate penetrating part; and an electrically conductive gas passage part provided in the gas introduction passage, being in contact with a bottom surface of the electrically insulating gas passage plug, being electrically continuous with the electrically conductive plate, and that allows gas to pass inside.
    Type: Application
    Filed: February 21, 2024
    Publication date: September 5, 2024
    Applicant: NGK INSULATORS, LTD.
    Inventors: Seiya INOUE, Tatsuya KUNO, Masaki ISHIKAWA, Taro USAMI, Ren NAKAMURA, Natsuki HIRATA, Kenji YONEMOTO
  • Publication number: 20240186170
    Abstract: A member for a semiconductor manufacturing apparatus includes: a ceramic plate that has a wafer placement surface at an upper surface thereof; a plug disposition hole that extends through the ceramic plate in an up-down direction and that has a truncated conical space whose upper opening is larger than a lower opening thereof; a truncated conical plug that is disposed in the plug disposition hole, that allows gas to flow in the up-down direction, and whose upper surface is larger than a lower surface thereof; an adhesive layer that is provided between the plug disposition hole and the truncated conical plug; an electrically conductive baseplate that is joined to a lower surface of the ceramic plate through a joint layer; and a gas supply path that is provided in the baseplate and the joint layer and that supplies gas to the truncated conical plug.
    Type: Application
    Filed: July 5, 2023
    Publication date: June 6, 2024
    Applicant: NGK INSULATORS, LTD.
    Inventors: Natsuki HIRATA, Shinya YOSHIDA, Tatsuya KUNO, Seiya INOUE, Taro USAMI, Kenji YONEMOTO, Aoi SAITO
  • Publication number: 20240153809
    Abstract: A member for a semiconductor manufacturing apparatus includes a ceramic plate; a composite plate joined to a lower surface of the ceramic plate; a cooling plate formed of a metal material, disposed on a lower surface of the composite plate; a first fastener that fastens the composite plate and the cooling plate; a support plate that is formed of an insulating material and supports a lower surface of the cooling plate; and a second fastener that fastens the cooling plate and the support plate, wherein, when the ceramic plate is heated from room temperature to high temperature, a first layered body including the ceramic plate and the composite plate deforms such that a central portion of the first layered body is convex, and a second layered body including the cooling plate and the support plate deforms such that a central portion of the second layered body is convex.
    Type: Application
    Filed: April 19, 2023
    Publication date: May 9, 2024
    Applicant: NGK INSULATORS, LTD.
    Inventors: Masaki ISHIKAWA, Tatsuya KUNO, Taro USAMI
  • Publication number: 20240079218
    Abstract: A wafer placement table includes an upper substrate; a lower substrate; a through hole extending through the lower substrate in an up-down direction; a plurality of projections provided in a dot pattern, for example, at an entirety of an upper surface of the lower substrate and being in contact with the lower surface of the upper substrate; a heat dissipation sheet having a projection insertion hole and being disposed between the upper substrate and the lower substrate; a screw hole provided, in the lower surface of the upper substrate, at a position facing the through hole; a screw member inserted from a lower surface of the lower substrate into the through hole and screwed into the screw hole; and a thermally conductive paste interposed, for example, between side surfaces of the projections and an inner peripheral surface of the projection insertion hole of the heat dissipation sheet.
    Type: Application
    Filed: February 14, 2023
    Publication date: March 7, 2024
    Applicant: NGK Insulators, Ltd.
    Inventors: Tatsuya KUNO, Taro USAMI, Masaki ISHIKAWA
  • Publication number: 20240079217
    Abstract: A wafer placement table includes an upper substrate; a lower substrate; a through hole extending through the lower substrate in an up-down direction; a plurality of projections provided in a dot pattern, for example, at an entirety of an upper surface of the lower substrate and being in contact with the lower surface of the upper substrate; a heat dissipation sheet having a projection insertion hole and being disposed between the upper substrate and the lower substrate; a screw hole provided, in the lower surface of the upper substrate, at a position facing the through hole; a screw member inserted from a lower surface of the lower substrate into the through hole and screwed into the screw hole.
    Type: Application
    Filed: February 9, 2023
    Publication date: March 7, 2024
    Applicant: NGK Insulators, Ltd.
    Inventors: Tatsuya KUNO, Taro USAMI, Masaki ISHIKAWA
  • Patent number: 8116894
    Abstract: A chemical mechanical polishing method including a step of forming a plurality of interlayer insulating films so as to coat a plurality of projecting patterns, at least one of the plurality of projecting patterns being formed on each of a plurality of substrates, whereby the plurality of projection patterns have different area ratios R with respect to the corresponding substrates, and performing a flattening process on the interlayer insulating films before linear approximation; a step of obtaining a linear approximation formula R=aT+b expressing a relationship between the area ratio R and a polishing time T, where R1, R2, R3, . . . , Rx represent the area ratio R of each of the projecting patterns with respect to the corresponding substrates, and T1, T2, T3, . . .
    Type: Grant
    Filed: December 19, 2008
    Date of Patent: February 14, 2012
    Assignee: Ricoh Company, Ltd.
    Inventors: Masanori Miyata, Taro Usami, Koichi Sogawa, Kenji Nishihara, Tadao Uehara, Shisyo Chin, Hiroaki Teratani, Akinori Suzuki, Yuuichi Kohno, Tetsuya Okada, Tohru Haruki
  • Publication number: 20090170323
    Abstract: A chemical mechanical polishing method including a step of forming a plurality of interlayer insulating films so as to coat a plurality of projecting patterns, at least one of the plurality of projecting patterns being formed on each of a plurality of substrates, whereby the plurality of projection patterns have different area ratios R with respect to the corresponding substrates, and performing a flattening process on the interlayer insulating films before linear approximation; a step of obtaining a linear approximation formula R=aT+b expressing a relationship between the area ratio R and a polishing time T, where R1, R2, R3, . . . , Rx represent the area ratio R of each of the projecting patterns with respect to the corresponding substrates, and T1, T2, T3, . . .
    Type: Application
    Filed: December 19, 2008
    Publication date: July 2, 2009
    Inventors: MASANORI MIYATA, Taro Usami, Koichi Sogawa, Kenji Nishihara, Tadao Uehara, Shisyo Chin, Hiroaki Teratani, Akinori Suzuki, Yuuichi Kohno, Tetsuya Okada, Tohru Haruki