Patents by Inventor TARUN MAHAJAN
TARUN MAHAJAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11619960Abstract: Some embodiments include apparatuses and methods of using such apparatuses. One of the apparatuses includes a control circuitry to generate error information based on a value of the feedback voltage generated from an output voltage, generate output information to control a power switching unit based on the error information provided to a forward path in the control circuitry, and adjust a gain of the forward path based on a gain factor computed based at least in part on a first value of the output information in order to cause the output information to have a second value. The control circuitry also computes a value of correction information when the output voltage is within a target value range, and adjusts the control information, based on the correction information, when the output voltage is outside the target value range.Type: GrantFiled: June 22, 2021Date of Patent: April 4, 2023Assignee: Intel CorporationInventors: Tarun Mahajan, Ramnarayanan Muthukaruppan, Rajesh Sidana, Srinath B. Pai
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Publication number: 20210318704Abstract: Some embodiments include apparatuses and methods of using such apparatuses. One of the apparatuses includes a control circuitry to generate error information based on a value of the feedback voltage generated from an output voltage, generate output information to control a power switching unit based on the error information provided to a forward path in the control circuitry, and adjust a gain of the forward path based on a gain factor computed based at least in part on a first value of the output information in order to cause the output information to have a second value. The control circuitry also computes a value of correction information when the output voltage is within a target value range, and adjusts the control information, based on the correction information, when the output voltage is outside the target value range.Type: ApplicationFiled: June 22, 2021Publication date: October 14, 2021Applicant: Intel CorporationInventors: Tarun Mahajan, Ramnarayanan Muthukaruppan, Rajesh Sidana, Srinath B. Pai
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Patent number: 11048283Abstract: Some embodiments include apparatuses and methods of using such apparatuses. One of the apparatuses includes a control circuitry to generate error information based on a value of the feedback voltage generated from an output voltage, generate output information to control a power switching unit based on the error information provided to a forward path in the control circuitry, and adjust a gain of the forward path based on a gain factor computed based at least in part on a first value of the output information in order to cause the output information to have a second value. The control circuitry also computes a value of correction information when the output voltage is within a target value range, and adjusts the control information, based on the correction information, when the output voltage is outside the target value range.Type: GrantFiled: February 24, 2020Date of Patent: June 29, 2021Assignee: Intel CorporationInventors: Tarun Mahajan, Ramnarayanan Muthukaruppan, Rajesh Sidana, Srinath B. Pai
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Publication number: 20200264645Abstract: Some embodiments include apparatuses and methods of using such apparatuses. One of the apparatuses includes a control circuitry to generate error information based on a value of the feedback voltage generated from an output voltage, generate output information to control a power switching unit based on the error information provided to a forward path in the control circuitry, and adjust a gain of the forward path based on a gain factor computed based at least in part on a first value of the output information in order to cause the output information to have a second value. The control circuitry also computes a value of correction information when the output voltage is within a target value range, and adjusts the control information, based on the correction information, when the output voltage is outside the target value range.Type: ApplicationFiled: February 24, 2020Publication date: August 20, 2020Inventors: Tarun Mahajan, Ramnarayanan Muthukaruppan, Rajesh Sidana, Srinath B. Pai
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Patent number: 10739729Abstract: An apparatus is provided which comprises: a first clock line to provide a first clock; a second clock line to provide a second clock; a delay line having a plurality of delay cells, wherein the delay line is coupled to the first and second clock lines, wherein the first clock is to sample the second clock; and circuitry coupled to the delay line, wherein the circuitry is to determine first or latest edge transitions from the outputs of the plurality of delay cells.Type: GrantFiled: January 8, 2019Date of Patent: August 11, 2020Assignee: Intel CorporationInventors: Tarun Mahajan, Dheeraj Shetty, Ramnarayanan Muthukaruppan
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Patent number: 10635124Abstract: Some embodiments include apparatuses and methods of using such apparatuses. One of the apparatuses includes a control circuitry to generate error information based on a value of the feedback voltage generated from an output voltage, generate output information to control a power switching unit based on the error information provided to a forward path in the control circuitry, and adjust a gain of the forward path based on a gain factor computed based at least in part on a first value of the output information in order to cause the output information to have a second value. The control circuitry also computes a value of correction information when the output voltage is within a target value range, and adjusts the control information, based on the correction information, when the output voltage is outside the target value range.Type: GrantFiled: April 11, 2017Date of Patent: April 28, 2020Assignee: Intel CorporationInventors: Tarun Mahajan, Ramnarayanan Muthukaruppan, Rajesh Sidana, Srinath B. Pai
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Publication number: 20190212704Abstract: An apparatus is provided which comprises: a first clock line to provide a first clock; a second clock line to provide a second clock; a delay line having a plurality of delay cells, wherein the delay line is coupled to the first and second clock lines, wherein the first clock is to sample the second clock; and circuitry coupled to the delay line, wherein the circuitry is to determine first or latest edge transitions from the outputs of the plurality of delay cells.Type: ApplicationFiled: January 8, 2019Publication date: July 11, 2019Applicant: Intel CorporationInventors: Tarun MAHAJAN, Dheeraj SHETTY, Ramnarayanan MUTHUKARUPPAN
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Patent number: 10348200Abstract: Described is an apparatus which comprises: an output node; a capacitor; an inductor having a first terminal coupled to the output node, and a second terminal coupled to the capacitor; a bridge to receive an input power supply and to generate a switching voltage signal at the output node; and a current sensor to determine slope of the switching voltage signal on the output node.Type: GrantFiled: June 2, 2014Date of Patent: July 9, 2019Assignee: INTEL CORPORATIONInventors: Tarun Mahajan, Ramnarayanan Ram Muthukaruppan, Srinivasulu Malepati, George Matthew
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Patent number: 10175655Abstract: An apparatus is provided which comprises: a first clock line to provide a first clock; a second clock line to provide a second clock; a delay line having a plurality of delay cells, wherein the delay line is coupled to the first and second clock lines, wherein the first clock is to sample the second clock; and circuitry coupled to the delay line, wherein the circuitry is to determine first or latest edge transitions from the outputs of the plurality of delay cells.Type: GrantFiled: March 17, 2017Date of Patent: January 8, 2019Assignee: Intel CorporationInventors: Tarun Mahajan, Dheeraj Shetty, Ramnarayanan Muthukaruppan
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Publication number: 20180292851Abstract: Some embodiments include apparatuses and methods of using such apparatuses. One of the apparatuses includes a control circuitry to generate error information based on a value of the feedback voltage generated from an output voltage, generate output information to control a power switching unit based on the error information provided to a forward path in the control circuitry, and adjust a gain of the forward path based on a gain factor computed based at least in part on a first value of the output information in order to cause the output information to have a second value. The control circuitry also computes a value of correction information when the output voltage is within a target value range, and adjusts the control information, based on the correction information, when the output voltage is outside the target value range.Type: ApplicationFiled: April 11, 2017Publication date: October 11, 2018Inventors: Tarun Mahajan, Ramnarayanan Muthukaruppan, Rajesh Sidana, Srinath B. Pai
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Publication number: 20180267480Abstract: An apparatus is provided which comprises: a first clock line to provide a first clock; a second clock line to provide a second clock; a delay line having a plurality of delay cells, wherein the delay line is coupled to the first and second clock lines, wherein the first clock is to sample the second clock; and circuitry coupled to the delay line, wherein the circuitry is to determine first or latest edge transitions from the outputs of the plurality of delay cells.Type: ApplicationFiled: March 17, 2017Publication date: September 20, 2018Inventors: Tarun MAHAJAN, Dheeraj SHETTY, Ramnarayanan MUTHUKARUPPAN
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Patent number: 9831863Abstract: Some embodiments include apparatus and methods having a node to provide a signal, and a control unit arranged to control a value of an output voltage at an output node on an output path based on a duty cycle of the signal and a value of an input voltage. The control unit can also be arranged to cause a change in a resistance on the output path in order to determine a value of a current on the output path based at least on the change in the resistance.Type: GrantFiled: November 14, 2016Date of Patent: November 28, 2017Assignee: Intel CorporationInventors: Santosh Nene, Tarun Mahajan, Venkataraman Srinivasan, Ramnarayanan Muthukaruppan
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Publication number: 20170063360Abstract: Some embodiments include apparatus and methods having a node to provide a signal, and a control unit arranged to control a value of an output voltage at an output node on an output path based on a duty cycle of the signal and a value of an input voltage. The control unit can also be arranged to cause a change in a resistance on the output path in order to determine a value of a current on the output path based at least on the change in the resistance.Type: ApplicationFiled: November 14, 2016Publication date: March 2, 2017Inventors: Santosh Nene, Tarun Mahajan, Venkataraman Srinivasan, Ramnarayanan Muthukaruppan
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Patent number: 9496852Abstract: Some embodiments include apparatus and methods having a node to provide a signal, and a control unit arranged to control a value of an output voltage at an output node on an output path based on a duty cycle of the signal and a value of an input voltage. The control unit can also be arranged to cause a change in a resistance on the output path in order to determine a value of a current on the output path based at least on the change in the resistance.Type: GrantFiled: December 4, 2014Date of Patent: November 15, 2016Assignee: Intel CorporationInventors: Santosh Nene, Tarun Mahajan, Venkataraman Srinivasan, Ramnarayanan Muthukaruppan
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Publication number: 20160282889Abstract: Some embodiments include apparatuses and methods having a power switching unit to receive a first voltage and provide a second voltage, and a control unit. The control unit can generate control information to control the power switching unit such that a value of the second voltage is less than a value of the first voltage. The control unit can also generate error correction information having a value based on a value of an error in the second voltage. The control unit can operate in a first mode if the error has a value less than a value of a threshold information and in a second mode if the error has a value greater than the value of the threshold information. The control unit can adjust the value of the control information by an amount proportional to the value of the error correction information in the second mode.Type: ApplicationFiled: March 26, 2015Publication date: September 29, 2016Inventors: Tarun Mahajan, Dheeraj Shetty, Ramnarayanan Muthukaruppan
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Publication number: 20160164500Abstract: Some embodiments include apparatus and methods having a node to provide a signal, and a control unit arranged to control a value of an output voltage at an output node on an output path based on a duty cycle of the signal and a value of an input voltage. The control unit can also be arranged to cause a change in a resistance on the output path in order to determine a value of a current on the output path based at least on the change in the resistance.Type: ApplicationFiled: December 4, 2014Publication date: June 9, 2016Inventors: Santosh Nene, Tarun Mahajan, Venkataraman Srinivasan, Ramnarayanan Muthukaruppan
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Publication number: 20160126730Abstract: Generally, this disclosure describes a system for sensing current in a power supply system. The apparatus includes controller circuitry to select a first power supply of a plurality of power supplies, determine a reference output voltage (Voutr) associated with a reference supply based, at least in part, on a duty cycle (D) and an input voltage (Vin), D and Vin related to the first power supply. The controller circuitry is further to determine an output voltage (Voutx) associated with the first power supply, determine an effective resistance (Reffx) associated with the first power supply based, at least in part, on a present temperature, and determine an output current (Ioutx) associated with the first power supply based, at least in part, on Voutr, Voutx and Reffx.Type: ApplicationFiled: November 5, 2014Publication date: May 5, 2016Applicant: Intel CorporationInventors: TARUN MAHAJAN, SANTOSH NENE
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Publication number: 20150346247Abstract: Described is an apparatus which comprises: an output node; a capacitor; an inductor having a first terminal coupled to the output node, and a second terminal coupled to the capacitor; a bridge to receive an input power supply and to generate a switching voltage signal at the output node; and a current sensor to determine slope of the switching voltage signal on the output node.Type: ApplicationFiled: June 2, 2014Publication date: December 3, 2015Inventors: Tarun Mahajan, Ramnarayanan Ram MUTHUKARUPPAN, Srinivasulu MALEPATI, George MATTHEW
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Publication number: 20150280559Abstract: Methods and apparatus relating to a unified control scheme for non-inverting high-efficiency buck-boost power converters are described. In an embodiment, compensator logic causes a buck-boost power converter to provide an output voltage with a higher voltage level than an input voltage in a boost operational mode of the buck-boost power converter and to provide the output voltage with a lower voltage level than the input voltage in a buck operational mode of the buck-boost power converter. The compensator logic provides N+1 bits to Pulse Width Modulation (PWM) generator logic to cause the buck-boost power converter to provide the output voltage. One of the N+1 bits indicates whether the buck-boost power converter is to provide the buck operation or the boost operation. Other embodiments are also disclosed and claimed.Type: ApplicationFiled: March 29, 2014Publication date: October 1, 2015Inventors: VAIBHAV VAIDYA, HARISH K. KRISHNAMURTHY, TARUN MAHAJAN