Patents by Inventor Tasao Soga
Tasao Soga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8907475Abstract: Provided are a bonded structure by a lead-free solder and an electronic article comprising the bonded structure. The bonded structure has a stable bonding interface with respect to a change in process of time, an enough strength and resistance to occurrence of whiskers while keeping good wettability of the solder. In the bonded structure, a lead-free Sn—Ag—Bi alloy solder is applied to an electrode through an Sn—Bi alloy layer. The Sn—Bi alloy, preferably, comprises 1 to 20 wt % Bi in order to obtain good wettability of the solder. In order to obtain desirable bonding characteristics having higher reliability in the invention, a copper layer is provided under the Sn—Bi alloy layer thereby obtaining an enough bonding strength.Type: GrantFiled: June 21, 2013Date of Patent: December 9, 2014Assignee: Renesas Electronics CorporationInventors: Hanae Shimokawa, Tasao Soga, Hiroaki Okudaira, Toshiharu Ishida, Tetsuya Nakatsuka, Yoshiharu Inaba, Asao Nishimura
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Publication number: 20130286621Abstract: Provided are a bonded structure by a lead-free solder and an electronic article comprising the bonded structure. The bonded structure has a stable bonding interface with respect to a change in process of time, an enough strength and resistance to occurrence of whiskers while keeping good wettability of the solder. In the bonded structure, a lead-free Sn—Ag—Bi alloy solder is applied to an electrode through an Sn—Bi alloy layer. The Sn—Bi alloy, preferably, comprises 1 to 20 wt % Bi in order to obtain good wettability of the solder. In order to obtain desirable bonding characteristics having higher reliability in the invention, a copper layer is provided under the Sn—Bi alloy layer thereby obtaining an enough bonding strength.Type: ApplicationFiled: June 21, 2013Publication date: October 31, 2013Inventors: Hanae SHIMOKAWA, Tasao SOGA, Hiroaki OKUDAIRA, Toshiharu ISHIDA, Tetsuya NAKATSUKA, Yoshiharu INABA, Asao NISHIMURA
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Patent number: 8503189Abstract: Provided are a bonded structure by a lead-free solder and an electronic article comprising the bonded structure. The bonded structure has a stable bonding interface with respect to a change in process of time, an enough strength and resistance to occurrence of whiskers while keeping good wettability of the solder. In the bonded structure, a lead-free Sn—Ag—Bi alloy solder is applied to an electrode through an Sn—Bi alloy layer. The Sn—Bi alloy, preferably, comprises 1 to 20 wt % Bi in order to obtain good wettability of the solder. In order to obtain desirable bonding characteristics having higher reliability in the invention, a copper layer is provided under the Sn—Bi alloy layer thereby obtaining an enough bonding strength.Type: GrantFiled: May 4, 2010Date of Patent: August 6, 2013Assignee: Renesas Electronics CorporationInventors: Hanae Shimokawa, Tasao Soga, Hiroaki Okudaira, Toshiharu Ishida, Tetsuya Nakatsuka, Yoshiharu Inaba, Asao Nishimura
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Patent number: 8125090Abstract: Use of Pb-free solder has become essential due to the environmental problem. A power module is formed by soldering substrates with large areas. It is known that in Sn-3Ag-0.5Cu which hardly creeps and deforms with respect to large deformation followed by warpage of the substrate, life is significantly shortened with respect to the temperature cycle test, and the conventional module structure is in the situation having difficulty in securing high reliability. Thus, the present invention has an object to select compositions from which increase in life can be expected at a low strain rate. In Sn solder, by doping In by 3 to 7% and Ag by 2 to 4.5%, the effect of delaying crack development at a low strain rate is found out, and as a representative composition stable at a high temperature, Sn-3Ag-0.5Cu-5In is selected. Further, for enhancement of reliability, a method for partially coating a solder end portion with a resin is shown.Type: GrantFiled: July 27, 2010Date of Patent: February 28, 2012Assignee: Hitachi, Ltd.Inventors: Tasao Soga, Daisuke Kawase, Kazuhiro Suzuki, Eiichi Morisaki, Katsuaki Saito, Hanae Shimokawa
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Patent number: 8022551Abstract: Each of junctions formed between a semiconductor device and a substrate comprises metal balls of Cu, or other materials and compounds of Sn and the metal balls, and the metal balls are bonded together by the compounds.Type: GrantFiled: April 7, 2006Date of Patent: September 20, 2011Assignee: Renesas Electronics CorporationInventors: Tasao Soga, Hanae Shimokawa, Tetsuya Nakatsuka, Kazuma Miura, Mikio Negishi, Hirokazu Nakajima, Tsuneo Endoh
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Patent number: 8004075Abstract: Use of Pb-free solder has become essential due to the environmental problem. A power module is formed by soldering substrates with large areas. It is known that in Sn-3Ag-0.5Cu which hardly creeps and deforms with respect to large deformation followed by warpage of the substrate, life is significantly shortened with respect to the temperature cycle test, and the conventional module structure is in the situation having difficulty in securing high reliability. Thus, the present invention has an object to select compositions from which increase in life can be expected at a low strain rate. In Sn solder, by doping In by 3 to 7% and Ag by 2 to 4.5%, the effect of delaying crack development at a low strain rate is found out, and as a representative composition stable at a high temperature, Sn-3Ag-0.5Cu-5In is selected. Further, for enhancement of reliability, a method for partially coating a solder end portion with a resin is shown.Type: GrantFiled: April 24, 2007Date of Patent: August 23, 2011Assignee: Hitachi, Ltd.Inventors: Tasao Soga, Daisuke Kawase, Kazuhiro Suzuki, Eiichi Morisaki, Katsuaki Saito, Hanae Shimokawa
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Publication number: 20100289148Abstract: Use of Pb-free solder has become essential due to the environmental problem. A power module is formed by soldering substrates with large areas. It is known that in Sn-3Ag-0.5Cu which hardly creeps and deforms with respect to large deformation followed by warpage of the substrate, life is significantly shortened with respect to the temperature cycle test, and the conventional module structure is in the situation having difficulty in securing high reliability. Thus, the present invention has an object to select compositions from which increase in life can be expected at a low strain rate. In Sn solder, by doping In by 3 to 7% and Ag by 2 to 4.5%, the effect of delaying crack development at a low strain rate is found out, and as a representative composition stable at a high temperature, Sn-3Ag-0.5Cu-5In is selected. Further, for enhancement of reliability, a method for partially coating a solder end portion with a resin is shown.Type: ApplicationFiled: July 27, 2010Publication date: November 18, 2010Inventors: Tasao SOGA, Daisuke Kawase, Kazuhiro Suzuki, Eiichi Morisaki, Katsuaki Saito, Hanae Shimokawa
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Publication number: 20100214753Abstract: Provided are a bonded structure by a lead-free solder and an electronic article comprising the bonded structure. The bonded structure has a stable bonding interface with respect to a change in process of time, an enough strength and resistance to occurrence of whiskers while keeping good wettability of the solder. In the bonded structure, a lead-free Sn—Ag—Bi alloy solder is applied to an electrode through an Sn—Bi alloy layer. The Sn—Bi alloy, preferably, comprises 1 to 20 wt % Bi in order to obtain good wettability of the solder. In order to obtain desirable bonding characteristics having higher reliability in the invention, a copper layer is provided under the Sn—Bi alloy layer thereby obtaining an enough bonding strength.Type: ApplicationFiled: May 4, 2010Publication date: August 26, 2010Inventors: Hanae SHIMOKAWA, Tasao Soga, Hiroaki Okudaira, Toshiharu Ishida, Tetsuya Nakatsuka, Yoshiharu Inaba, Asao Nishimura
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Patent number: 7722962Abstract: A solder foil formed from a material comprising particles of Cu, etc. as metal particles and Sn particles as solder particles by rolling is suitable for solder bonding at a high temperature side in temperature-hierarchical bonding, and semiconductor devices and electronic devices produced by use of such solder bonding have distinguished reliability of mechanical characteristics, etc.Type: GrantFiled: December 19, 2001Date of Patent: May 25, 2010Assignee: Renesas Technology Corp.Inventors: Tasao Soga, Hanae Hata, Toshiharu Ishida, Kanko Ishida, legal representative, Tetsuya Nakatsuka, Masahide Okamoto, Kazuma Miura
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Patent number: 7709746Abstract: Provided are a bonded structure by a lead-free solder and an electronic article comprising the bonded structure. The bonded structure has a stable bonding interface with respect to a change in process of time, an enough strength and resistance to occurrence of whiskers while keeping good wettability of the solder. In the bonded structure, a lead-free Sn—Ag—Bi alloy solder is applied to an electrode through an Sn—Bi alloy layer. The Sn—Bi alloy, preferably, comprises 1 to 20 wt % Bi in order to obtain good wettability of the solder. In order to obtain desirable bonding characteristics having higher reliability in the invention, a copper layer is provided under the Sn—Bi alloy layer thereby obtaining an enough bonding strength.Type: GrantFiled: January 13, 2006Date of Patent: May 4, 2010Assignee: Renesas Technology Corp.Inventors: Hanae Shimokawa, Tasao Soga, Hiroaki Okudaira, Toshiharu Ishida, Tetsuya Nakatsuka, Yoshiharu Inaba, Asao Nishimura
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Patent number: 7671465Abstract: A power semiconductor module having an increased reliability against thermal fatigue includes a power semiconductor element, a lower-side electrode connected to the lower side of the element, a first insulating substrate connected to the upper side of the lower-side electrode and having metallic foils bonded on both surfaces thereof, an upper-side electrode connected to the upper side of the power semiconductor element, a second insulating substrate connected to the upper side of the upper-side electrode and having metallic foils bonded on both surfaces thereof, a first heat spreader connected to the lower side of the first insulating substrate, and a second heat spreader connected to the upper side of the second insulating substrate. The power semiconductor element and the first and second insulating substrates are sealed with a resin.Type: GrantFiled: January 25, 2007Date of Patent: March 2, 2010Assignee: Hitachi, Ltd.Inventors: Sunao Funakoshi, Katsumi Ishikawa, Tasao Soga
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Patent number: 7547966Abstract: A power semiconductor module with its thermal resistance and overall size reduced. Insulating substrates with electrode metal layers disposed thereon are joined to both the surfaces of a power semiconductor chip by using, for example, soldering. Metal layers are disposed also on the reverse surfaces of the insulating substrates and the metal layers are joined to the heat spreaders by using brazing. Heat radiating fins are provided on the heat radiating surface of at least one of the heat spreaders. The heat radiating side of each of the heat spreaders is covered by a casing to form a refrigerant chamber through which refrigerant flows to remove heat transmitted from the semiconductor chip to the heat spreader.Type: GrantFiled: October 17, 2007Date of Patent: June 16, 2009Assignee: Hitachi, Ltd.Inventors: Sunao Funakoshi, Katsumi Ishikawa, Tasao Soga
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Publication number: 20090116197Abstract: A power semiconductor module includes first and second insulating substrates, a power semiconductor device joined directly or through another element to opposite sides of the first and second insulating substrates and first and second heat spreaders joined with joining material having fluidity upon joining so as to put the first and second insulating substrates between the first and second heat spreaders. When the power semiconductor module is fabricated, the first and second insulating substrates are joined to the first and second heat spreaders, respectively, in the state that weight bearing on joining material is reduced by means of resilient member.Type: ApplicationFiled: October 31, 2008Publication date: May 7, 2009Inventors: Sunao FUNAKOSHI, Katsumi Ishikawa, Tasao Soga
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Publication number: 20080224303Abstract: A power semiconductor module with its thermal resistance and overall size reduced. Insulating substrates with electrode metal layers disposed thereon are joined to both the surfaces of a power semiconductor chip by using, for example, soldering. Metal layers are disposed also on the reverse surfaces of the insulating substrates and the metal layers are joined to the heat spreaders by using brazing. Heat radiating fins are provided on the heat radiating surface of at least one of the heat spreaders. The heat radiating side of each of the heat spreaders is covered by a casing to form a refrigerant chamber through which refrigerant flows to remove heat transmitted from the semiconductor chip to the heat spreader.Type: ApplicationFiled: October 17, 2007Publication date: September 18, 2008Inventors: Sunao Funakoshi, Katsumi Ishikawa, Tasao Soga
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Publication number: 20070246833Abstract: Use of Pb-free solder has become essential due to the environmental problem. A power module is formed by soldering substrates with large areas. It is known that in Sn-3Ag-0.5Cu which hardly creeps and deforms with respect to large deformation followed by warpage of the substrate, life is significantly shortened with respect to the temperature cycle test, and the conventional module structure is in the situation having difficulty in securing high reliability. Thus, the present invention has an object to select compositions from which increase in life can be expected at a low strain rate. In Sn solder, by doping In by 3 to 7% and Ag by 2 to 4.5%, the effect of delaying crack development at a low strain rate is found out, and as a representative composition stable at a high temperature, Sn-3Ag-0.5Cu-5In is selected. Further, for enhancement of reliability, a method for partially coating a solder end portion with a resin is shown.Type: ApplicationFiled: April 24, 2007Publication date: October 25, 2007Inventors: Tasao Soga, Daisuke Kawase, Kazuhiro Suzuki, Eiichi Morisaki, Katsuaki Saito, Hanae Shimokawa
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Publication number: 20070216013Abstract: A power semiconductor module having an increased reliability against thermal fatigue includes a power semiconductor element, a lower-side electrode connected to the lower side of the element, a first insulating substrate connected to the upper side of the lower-side electrode and having metallic foils bonded on both surfaces thereof, an upper-side electrode connected to the upper side of the power semiconductor element, a second insulating substrate connected to the upper side of the upper-side electrode and having metallic foils bonded on both surfaces thereof, a first heat spreader connected to the lower side of the first insulating substrate, and a second heat spreader connected to the upper side of the second insulating substrate. The power semiconductor element and the first and second insulating substrates are sealed with a resin.Type: ApplicationFiled: January 25, 2007Publication date: September 20, 2007Inventors: Sunao Funakoshi, Katsumi Ishikawa, Tasao Soga
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Patent number: 7259465Abstract: Each of junctions formed between a semiconductor device and a substrate comprises metal balls of Cu, etc., and compounds of Sn and the metal balls, and the metal balls are bonded together by the compounds.Type: GrantFiled: March 22, 2002Date of Patent: August 21, 2007Assignee: Hitachi, Ltd.Inventors: Tasao Soga, Hanae Shimokawa, Tetsuya Nakatsuka, Kazuma Miura, Mikio Negishi, Hirokazu Nakajima, Tsuneo Endoh
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Publication number: 20070031279Abstract: Each of junctions formed between a semiconductor device and a substrate comprises metal balls of Cu, or other materials and compounds of Sn and the metal balls, and the metal balls are bonded together by the compounds.Type: ApplicationFiled: April 7, 2006Publication date: February 8, 2007Applicant: Renesas Technology CorporationInventors: Tasao Soga, Hanae Shimokawa, Tetsuya Nakatsuka, Kazuma Miura, Mikio Negishi, Hirokazu Nakajima, Tsuneo Endoh
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Patent number: 7145236Abstract: A semiconductor module solder bonding of high reliability in which the heat resisting properties of the circuit substrate and electronic parts are taken into consideration. In order to achieve this, there are provided semiconductor devices each having solder bumps as external pads, and a circuit substrate bonded to the external pads of each of the semiconductor devices through a solder paste, each of the solder bumps being made of a first lead-free solder, the solder paste being made of a second lead-free solder having a melting point lower than that of the first lead-free solder.Type: GrantFiled: October 8, 2002Date of Patent: December 5, 2006Assignee: Renesas Technology Corp.Inventors: Kazuma Miura, Hanae Shimokawa, Koji Serizawa, Tasao Soga, Tetsuya Nakatsuka
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Patent number: 7075183Abstract: Each of junctions formed between a semiconductor device and a substrate comprises metal balls of Cu etc. and compounds of Sn and the metal balls, and the metal balls are bonded together by the compounds.Type: GrantFiled: June 12, 2001Date of Patent: July 11, 2006Assignee: Hitachi, Ltd.Inventors: Tasao Soga, Hanae Shimokawa, Tetsuya Nakatsuka, Kazuma Miura, Mikio Negishi, Hirokazu Nakajima, Tsuneo Endoh