Patents by Inventor Tasuku Ishigooka
Tasuku Ishigooka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240394168Abstract: To reproduce, in consideration of the distributed hardware configuration, a software execution timing in a target environment on a host environment with high accuracy. A simulation method includes: extracting a first host feature value 11 obtained by executing first software 10 on a host environment 100; executing the first software 10 on a target environment 110 to calculate a target execution time 20 taken to execute the first software 10 on the target environment 110; calculating a performance difference between the host environment 100 and the target environment 110 based on the first host feature value 11 and the target execution time 20; extracting a second host feature value 13 obtained by executing second software 12 on the host environment 100; and estimating a time 40 taken to execute the second software 12 on the target environment 110 based on the second host feature value 13 and the performance difference.Type: ApplicationFiled: August 15, 2022Publication date: November 28, 2024Applicant: HITACHI ASTEMO, LTD.Inventors: Yuma KATO, Tasuku ISHIGOOKA, Yasuhiro FUSE, Akihiro KONDO, Yoshitaka ATARASHI
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Patent number: 12117943Abstract: An object of the present invention is to provide a technology that enables second control software to continue processing using a peripheral circuit even in a situation where an abnormality related to first control software occurs. An electronic control device includes a memory (3) that stores the first control software and the second control software, a CPU (1) that executes the first control software and the second control software, and a peripheral circuit (200) used by the first control software and the second control software. The memory further includes a first buffer (313a) and a second buffer (323a). The CPU interrupts at least one of the processing of storing first peripheral transmission information in the first buffer and the processing of transmitting the first peripheral transmission information to the peripheral in a specific situation in which the abnormality related to the first control software occurs.Type: GrantFiled: September 9, 2021Date of Patent: October 15, 2024Assignee: Hitachi Astemo, Ltd.Inventors: Masashi Mizoguchi, Tomohito Ebina, Tasuku Ishigooka, Kazuyoshi Serizawa, Kenichi Osada
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Publication number: 20240330166Abstract: A vehicle control system includes: a computation unit that executes a computation of first control software when a vehicle is in a first state and that executes a computation of second control software when the vehicle is in a second state; a comparison reference data saving unit that saves input data input from a sensor to the first control software and to the second control software and that saves output data from the first control software and the second control software; and an evaluation unit that evaluates the performance of the second control software, based on a difference between pieces of output data read from the comparison reference data saving unit.Type: ApplicationFiled: February 8, 2022Publication date: October 3, 2024Applicant: HITACHI ASTEMO, LTD.Inventors: Takeshi FUKUDA, Tasuku ISHIGOOKA, Masashi MIZOGUCHI, Takashi MURAKAMI, Kazuyoshi SERIZAWA, Tomohito EBINA
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Patent number: 12103546Abstract: Provided is a vehicle control device capable of executing control processing by utilizing a power saving execution determination unit that determines a shift to or a release from a normal mode to a power saving mode on the basis of a preset power saving condition, and a power saving execution unit that executes power saving control of the CPU by determining a shift to the power saving mode and stops the power saving control of the CPU by determining a release of the power saving mode. Then, the power saving execution determination unit has a plurality of power saving conditions, determines to shift to the power saving mode in a case where all of the plurality of power saving conditions are satisfied, and determines to release the power saving mode in the case of being changed to a state in which some of the power saving conditions are not satisfied.Type: GrantFiled: December 18, 2020Date of Patent: October 1, 2024Assignee: Hitachi Astemo, Ltd.Inventors: Tasuku Ishigooka, Nobuyasu Kanekawa, Tomohito Ebina, Kazuyoshi Serizawa, Tatsuya Horiguchi
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Publication number: 20240300501Abstract: Provided is a technology capable of adding a new function by updating a program of an in-vehicle computer system. An in-vehicle computer system includes a plurality of ECUs. Each ECU is able to communicate with at least one other ECU via a communication bus. An in-vehicle computer system includes a measurement means that measures an ECU state for the ECUs, an estimation means that estimates a vehicle state based on the ECU state and a connection configuration of a communication bus, and a management means that acquires an update program and execution conditions of the update program. The management means selects a first ECU that is to execute the update program based on the vehicle state and the execution conditions. The first ECU executes the update program. The management means determines whether or not an output delay constraint of the update program is satisfied. The management means terminates execution of a redundancy program redundant to the update program.Type: ApplicationFiled: September 14, 2021Publication date: September 12, 2024Inventors: Swarn Singh RATHOUR, Tasuku ISHIGOOKA, Satoshi OTSUKA, Hideyuki SAKAMOTO
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Publication number: 20240253646Abstract: An object of the present invention is to provide a vehicle control device and a vehicle control system capable of further reducing system cost in failure mitigation. The vehicle control device includes a master ECU and one or more client ECUs.Type: ApplicationFiled: March 4, 2022Publication date: August 1, 2024Inventors: Swarn Singh RATHOUR, Tasuku ISHIGOOKA, Hideyuki SAKAMOTO, Takeshi FUKUDA, Fumio NARISAWA
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Publication number: 20240241747Abstract: An electronic controller includes: a virtual machine that accesses a first virtual driver to execute a process; a hypervisor that calls a first real driver of a first peripheral, based on a peripheral access request received from the first virtual driver; an access recording unit that calls the first virtual driver to record a peripheral access request transmitted to the hypervisor; a state recording unit that calls the first real driver to record a state of a register of the first peripheral; and a monitoring unit that monitors an operation of the hypervisor. The monitoring unit determines an abnormality of the hypervisor, based on a record by the access recording unit and on a record by the state recording unit.Type: ApplicationFiled: February 4, 2022Publication date: July 18, 2024Applicant: Hitachi Astemo, Ltd.Inventors: Masashi MIZOGUCHI, Tomohito EBINA, Kazuyoshi SERIZAWA, Kenichi OSADA, Tasuku ISHIGOOKA, Takeshi FUKUDA
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Publication number: 20240119827Abstract: A control system comprises: moving body detecting units transmitting information about moving bodies; and a control system receives the moving body information and transmits it to a control processing unit. The control system comprises: a surplus time calculation unit that calculates a first surplus time on the basis of the response time and an estimated time required for communication control of the moving body; a processing management unit that determines an execution sequence for the control information; an application unit that calculates control information on the basis of the information about moving bodies and the execution sequence determined by the processing management unit; and a transmission control unit that calculates a second surplus time on the basis of the response time of the moving body and the actual time required for communication control, and transmits control information to the control processing unit according to the second surplus time.Type: ApplicationFiled: March 1, 2022Publication date: April 11, 2024Applicant: Hitachi, Ltd.Inventor: Tasuku ISHIGOOKA
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Patent number: 11947486Abstract: The computing efficiency of an electronic computing device is improved. HPCs 20 to 23 include arithmetic processing units HA0 to HA3, respectively. Each of the arithmetic processing units HA0 to HA3 executes arithmetic processing in parallel. LPCs 30 to 33 includes management processing units LB0 to LB3, respectively. Each of the management processing units LB0 to LB3 manages execution of specific processing by an accelerator 6 when each of the arithmetic processing units HA0 to HA3 causes the accelerator 6 to execute the specific processing, and performs a series of commands for causing the accelerator 6 to execute the specific processing on a DMA controller 5 and the accelerator 6.Type: GrantFiled: March 25, 2020Date of Patent: April 2, 2024Assignee: Hitachi Astemo, Ltd.Inventors: Tatsuya Horiguchi, Tasuku Ishigooka, Kazuyoshi Serizawa, Tsunamichi Tsukidate
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Publication number: 20240092352Abstract: To achieve both guarantee of safety related to vehicle control and improvement of availability in an in-vehicle device that cannot independently perform automatic driving and needs assistance of vehicle control. To achieve the above object, a control system includes an in-vehicle device and a coordination device that are synchronized in time point. The control system includes a travelable time calculation unit that calculates a travelable time for guaranteeing that a vehicle does not collide with an obstacle on a travel trajectory in a target region through which the vehicle equipped with the in-vehicle device passes, a travelability determination unit that determines validity of the travelable time, and a trajectory following unit that permits the in-vehicle device to follow the travel trajectory when it is determined that the travelable time is valid.Type: ApplicationFiled: August 26, 2021Publication date: March 21, 2024Applicant: HITACHI ASTEMO, LTD.Inventors: Yuma KATO, Tasuku ISHIGOOKA, Yoshitaka ATARASHI, Hideki ENDO
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Patent number: 11934865Abstract: The present disclosure improves usability and stability of a control system while suppressing resource consumption. A control controller according to the present disclosure divides, using partitioning, function groups for which control is ongoing and function groups to be updated, and updates, in accordance with conditions, only the function groups to be updated, thereby updating the required control functions while continuing appropriate control processes.Type: GrantFiled: June 13, 2018Date of Patent: March 19, 2024Assignee: Hitachi, Ltd.Inventor: Tasuku Ishigooka
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Publication number: 20240020245Abstract: An object of the present invention is to provide a technology that enables second control software to continue processing using a peripheral circuit even in a situation where an abnormality related to first control software occurs. An electronic control device includes a memory (3) that stores the first control software and the second control software, a CPU (1) that executes the first control software and the second control software, and a peripheral circuit (200) used by the first control software and the second control software. The memory further includes a first buffer (313a) and a second buffer (323a). The CPU interrupts at least one of the processing of storing first peripheral transmission information in the first buffer and the processing of transmitting the first peripheral transmission information to the peripheral in a specific situation in which the abnormality related to the first control software occurs.Type: ApplicationFiled: September 9, 2021Publication date: January 18, 2024Applicant: HITACHI ASTEMO, LTD.Inventors: Masashi MIZOGUCHI, Tomohito EBINA, Tasuku ISHIGOOKA, Kazuyoshi SERIZAWA, Kenichi OSADA
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Publication number: 20230415677Abstract: Provided is a vehicle control device capable of improving safety and availability by determining, in response to a failure of a core, a core to which the software is to be moved, determining whether there is a contention in the timings of execution based on software operations after the software is moved to another core, and making an arbitration when there is a contention. The vehicle control device has a CPU 11 that executes a plurality of tasks in clock-synchronization, the vehicle control device including a failure detecting unit 121 that detects a failure of a core 10 on the CPU 11, and an execution timing arbitration unit 124 that allocates a task having been executed by a failed core 10 to a non-failed core 10.Type: ApplicationFiled: August 31, 2021Publication date: December 28, 2023Applicant: HITACHI ASTEMO, LTD.Inventors: Tasuku ISHIGOOKA, Kazuyoshi SERIZAWA, Takashi MURAKAMI
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Publication number: 20230339484Abstract: Provided is a vehicle control device capable of executing control processing by utilizing a power saving execution determination unit that determines a shift to or a release from a normal mode to a power saving mode on the basis of a preset power saving condition, and a power saving execution unit that executes power saving control of the CPU by determining a shift to the power saving mode and stops the power saving control of the CPU by determining a release of the power saving mode. Then, the power saving execution determination unit has a plurality of power saving conditions, determines to shift to the power saving mode in a case where all of the plurality of power saving conditions are satisfied, and determines to release the power saving mode in the case of being changed to a state in which some of the power saving conditions are not satisfied.Type: ApplicationFiled: December 18, 2020Publication date: October 26, 2023Applicant: Hitachi Astemo, Ltd.Inventors: Tasuku ISHIGOOKA, Nobuyasu KANEKAWA, Tomohito EBINA, Kazuyoshi SERIZAWA, Tatsuya HORIGUCHI
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Publication number: 20230322261Abstract: An autonomous travel control system having a vehicle control system that is mounted in a vehicle and that controls automatic driving of the vehicle, and a safety monitoring system for monitoring a field F, are connected so as to enable communication. The safety monitoring system is provided with: a monitoring processing unit for recognizing an object and creating outside world recognition information; a reception unit for receiving automatic driving control information transmitted from the vehicle control system; a verification unit for verifying, on the basis of the outside world recognition information, the safety of the automatic driving control information received by the reception unit; and a transmission unit for transmitting the result of the verification by the verification unit to the vehicle control system. The vehicle control system controls automatic driving of the vehicle on the basis of the verification result transmitted by the safety monitoring system.Type: ApplicationFiled: August 27, 2021Publication date: October 12, 2023Inventors: Satoshi OTSUKA, Tasuku ISHIGOOKA
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Publication number: 20230267837Abstract: Provided is a traffic control system capable of ensuring safety even when an autonomous mobile body, a manned mobile body, or a pedestrian has committed a safety rule violation. This traffic control system comprises a mobile body, an infrastructure sensor that monitors the mobile body and a pedestrian within a field, and a safety monitoring device that communicates wirelessly with the mobile body.Type: ApplicationFiled: April 20, 2021Publication date: August 24, 2023Inventors: Tasuku ISHIGOOKA, Satoshi OTSUKA
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Publication number: 20230222050Abstract: A vehicle control device includes a verification management unit that executes old control software unit 112 representing an old version of control software and new control software unit 113 representing a new version of control software in sequence or in parallel, and an output verification unit that when an output value from old control software unit 112 and an output value from new control software unit 113 do not match, outputs information indicating the output values' not matching.Type: ApplicationFiled: June 10, 2021Publication date: July 13, 2023Applicant: HITACHI ASTEMO, LTD.Inventors: Tasuku ISHIGOOKA, Kazuyoshi SERIZAWA
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Publication number: 20220398135Abstract: To appropriately execute a task by an electronic control device including a processor having a plurality of cores. An ECU 100 includes a multi-core CPU having a plurality of cores that execute a first task that has an execution time that varies depending on a processing amount every predetermined cycle and a second task that is higher in priority than the first task and is prohibited from being interrupted. The second task is set to be inexecutable simultaneously between the plurality of cores. A task allocation unit 11 generates a first plan. A diagnosis task planning unit 12 generates a second plan. Task processing units 10a and 10b execute the first task based on the first plan. A diagnosis task correction unit 13 times a delay time of the first task executed by the task processing units 10a and 10b, and postpones the second task of the second plan to the subsequent executable timing in accordance with the timed delay time.Type: ApplicationFiled: September 29, 2020Publication date: December 15, 2022Applicant: HITACHI ASTEMO, LTD.Inventors: Masashi MIZOGUCHI, Fumio NARISAWA, Hiroyuki NAKAMURA, Tasuku ISHIGOOKA, Yuki TANAKA
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Patent number: 11467865Abstract: In the present invention, when an abnormality occurs in a task, regardless of whether a critical section is being executed, timeout detection is realized by determining whether the critical section (CS) is necessary for the design in a preset task execution time and a certain period of time to distinguish between necessary interrupt disable and abnormal interrupt disable. A vehicle control device includes task execution means for causing a system to execute a task, and interrupt processing means for performing an interrupt process at the time of execution of the task. A maskable interrupt and a non-maskable interrupt that is commanded to execute after the maskable interrupt are included, the maskable interrupt is commanded to execute during an interrupt disable time, and then the non-maskable interrupt is executed.Type: GrantFiled: June 28, 2018Date of Patent: October 11, 2022Assignee: HITACHI ASTEMO, LTD.Inventors: Tsunamichi Tsukidate, Tasuku Ishigooka, Tomohito Ebina, Kazuyoshi Serizawa
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Publication number: 20220214993Abstract: The computing efficiency of an electronic computing device is improved. HPCs 20 to 23 include arithmetic processing units HA0 to HA3, respectively. Each of the arithmetic processing units HA0 to HA3 executes arithmetic processing in parallel. LPCs 30 to 33 includes management processing units LB0 to LB3, respectively. Each of the management processing units LB0 to LB3 manages execution of specific processing by an accelerator 6 when each of the arithmetic processing units HA0 to HA3 causes the accelerator 6 to execute the specific processing, and performs a series of commands for causing the accelerator 6 to execute the specific processing on a DMA controller 5 and the accelerator 6.Type: ApplicationFiled: March 25, 2020Publication date: July 7, 2022Applicant: Hitachi Astemo, Ltd.Inventors: Tatsuya HORIGUCHI, Tasuku ISHIGOOKA, Kazuyoshi SERIZAWA, Tsunamichi TSUKIDATE