Abstract: Selective placement of polishing dummy feature patterns, rather than indiscriminate placement of polishing dummy feature patterns, is used. Both low frequency (hundreds of microns and larger) and high frequency (10 microns and less) of topography changes are examined. The polishing dummy feature patterns can be specifically tailored to a semiconductor device and polishing conditions used in forming the semiconductor device. When designing an integrated circuit, polishing effects for the active features can be predicted. After polishing dummy feature pattern(s) are placed into the layout, the planarity can be examined on a local level (a portion but not all of the device) and a more global level (all of the device, devices corresponding to a reticle field, or even an entire wafer).

Abstract: Selective placement of polishing dummy feature patterns, rather than indiscriminate placement of polishing dummy feature patterns, is used. Both low frequency (hundreds of microns and larger) and high frequency (10 microns and less) of topography changes are examined. The polishing dummy feature patterns can be specifically tailored to a semiconductor device and polishing conditions used in forming the semiconductor device. When designing an integrated circuit, polishing effects for the active features can be predicted. After polishing dummy feature pattern(s) are placed into the layout, the planarity can be examined on a local level (a portion but not all of the device) and a more global level (all of the device, devices corresponding to a reticle field, or even an entire wafer).

Abstract: Selective placement of polishing dummy feature patterns, rather than indiscriminate placement of polishing dummy feature patterns, is used. Both low frequency (hundreds of microns and larger) and high frequency (10 microns and less) of topography changes are examined. The polishing dummy feature patterns can be specifically tailored to a semiconductor device and polishing conditions used in forming the semiconductor device. When designing an integrated circuit, polishing effects for the active features can be predicted. After polishing dummy feature pattern(s) are placed into the layout, the planarity can be examined on a local level (a portion but not all of the device) and a more global level (all of the device, devices corresponding to a reticle field, or even an entire wafer).

Abstract: The present invention includes a modified polishing pad and methods on how to form and use the polishing pad. In one embodiment, a modified polishing pad is formed similar to polishing substrates except that the modifying pressure should be large enough to mechanically deform part of the polishing pad. The modifying pressure is typically at least 10 pounds per square inch. The materials used to modify the pad should be hard with a smooth surface. Examples of these materials are metals, dielectrics, and semiconductors. After modifying the polishing pad, it may be used to polish semiconductor substrates. Compared to a fresh pad, the modified polishing pad should have a higher planarization efficiency and be less likely to cause corner rounding of a patterned layer adjacent to an opening.

Abstract: A mold is used to form a polishing pad, wherein the surface of the polishing side of the polishing pad is determined by a primary surface of the mold. Features along the polishing side of a polishing pad may take any one of several different shapes. Channels along the polishing side of the polishing pad allow a smaller pore size to be used. The mold allows more control over the surface of the polishing side, which in turn give more control over polishing characteristics.

Abstract: A chemical-mechanical-polishing process in which energy is imparted to a polishing pad (18) dislodging particles (46), which are removed by vacuum withdrawal to continuously clean the surface of the polishing pad (14). Energy is imparted to polishing pad (18) by either sonic energy from acoustic waves, or by physical impaction. The acoustic waves are generated by submerging a transducer (28) in the polishing slurry (18). The transducer (28) is powered by a voltage amplifier (30) coupled to a computer controlled-frequency generator (32). The acoustic wave frequency is adjusted by the frequency generator (32) to induce sonic vibration in the polishing pad (14) such that particles (46) are continuously dislodged from polishing pad (14). Physical impaction is performed by an impaction tool (48) coupled to a vacuum head (33).

Abstract: A mold is used to form a polishing pad, wherein the surface of the polishing side of the polishing pad is determined by a primary surface of the mold. Features along the polishing side of a polishing pad may take any one of several different shapes. Channels along the polishing side of the polishing pad allow a smaller pore size to be used. The mold allows more control over the surface of the polishing side, which in turn give more control over polishing characteristics.

Abstract: A chemical-mechanical-polishing process in which acoustic waves are generated in the polishing slurry (18) to enable detection of an end-point in the polishing process, and to continuously clean the surface of a polishing pad (14) in a polishing apparatus (10). Acoustic waves are generated in the polishing slurry (18) by submerging a transducer (28) in the polishing slurry (18). The transducer (28) is powered by a voltage amplifier (30) coupled to a frequency generator (32). The frequency of the acoustic waves is adjusted by the frequency generator (32) to obtain optimum wave generation in the polishing slurry (18). The end-point of the polishing process is detected by a change in the acoustic wave velocity in the polishing slurry (18), which occurs when the slurry composition changes at end-point. The wave velocity is monitored by a receiver (34) submerged in the polishing slurry (18) at a predetermined distance from the transducer (28).