Patents by Inventor Tat Leung Lai

Tat Leung Lai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6774662
    Abstract: A production test machine pre-screens panels of memory modules for shorts and leakage and other D.C. parameters. Memory modules are constructed as part of a panel of 6 or so modules formed on the same substrate. The modules are connected together by links of the substrate. The D.C. tests are performed on memory modules before separation from the panel (de-panelization), while the modules are still connected together by the panel links. Using parallel testing, a whole panel of modules can be D.C. tested at the same time. Failing modules can then be marked or noted, and the good modules separated from the panel links and sent to a more expensive A.C. tester for functional testing. The spacing or pitch of test heads on the D.C. tester can be adjusted for different sizes of panels.
    Type: Grant
    Filed: December 29, 2003
    Date of Patent: August 10, 2004
    Assignee: Kingston Technology Co.
    Inventors: Ramon S. Co, Tat Leung Lai
  • Publication number: 20040113607
    Abstract: A production test machine pre-screens panels of memory modules for shorts and leakage and other D.C. parameters. Memory modules are constructed as part of a panel of 6 or so modules formed on the same substrate. The modules are connected together by links of the substrate. The D.C. tests are performed on memory modules before separation from the panel (de-panelization), while the modules are still connected together by the panel links. Using parallel testing, a whole panel of modules can be D.C. tested at the same time. Failing modules can then be marked or noted, and the good modules separated from the panel links and sent to a more expensive A.C. tester for functional testing. The spacing or pitch of test heads on the D.C. tester can be adjusted for different sizes of panels.
    Type: Application
    Filed: December 29, 2003
    Publication date: June 17, 2004
    Applicant: KINGSTON TECHNOLOGY COMPANY
    Inventors: Ramon S. Co, Tat Leung Lai
  • Publication number: 20040078698
    Abstract: A test system for testing memory modules uses vertically-mounted personal computer (PC) motherboards. Many test adaptor boards that contain test sockets for testing memory modules are mounted horizontally across a test bench. Each test adaptor board connects to a motherboard that tests the memory modules in the test sockets. The motherboard is mounted below and perpendicularly to the test adaptor board. The motherboard is modified to extend the memory bus to edge contact pads along an edge of the motherboard. An edge socket on the test adaptor board mates with the edge contact pads to make electrical connection. A robotic arm inserts a memory module into the test socket, allowing the vertically-mounted motherboard to execute programs to test the memory module. The density of vertically-mounted motherboards is 2-4 times higher than with horizontally-mounted motherboards.
    Type: Application
    Filed: May 12, 2003
    Publication date: April 22, 2004
    Applicant: KINGSTON TECHNOLOGY CORP.
    Inventors: Ramon S. Co, Tat Leung Lai, David Da-Wei Sun
  • Patent number: 6700398
    Abstract: A production test machine pre-screens panels of memory modules for shorts and leakage and other D.C. parameters. Memory modules are constructed as part of a panel of 6 or so modules formed on the same substrate. The modules are connected together by links of the substrate. The D.C. tests are performed on memory modules before separation from the panel (de-panelization), while the modules are still connected together by the panel links. Using parallel testing, a whole panel of modules can be D.C. tested at the same time. Failing modules can then be marked or noted, and the good modules separated from the panel links and sent to a more expensive A.C. tester for functional testing. The spacing or pitch of test heads on the D.C. tester can be adjusted for different sizes of panels.
    Type: Grant
    Filed: November 28, 2000
    Date of Patent: March 2, 2004
    Assignee: Kingston Technology Company
    Inventors: Ramon S. Co, Tat Leung Lai
  • Patent number: 6351827
    Abstract: Margin testing of memory modules uses a personal computer (PC) motherboard. A test adaptor board has a test socket that receives a memory module under test. Pins from the test adaptor board are plugged into holes of a removed memory-module socket on the motherboard, mounted on the reverse, solder side of the motherboard. The test adapter board has a voltage regulator that controls the power-supply (Vcc) voltage applied to the module under test. A delay circuit on the test adapter board varies the phase delay of a clock to the memory module under test. Margin control signals are generated by a controller card in the PC's expansion slots, to control Vcc and clock delay to the module under test without changing the motherboard's Vcc voltage. The test program executing on the PC motherboard writes to the controller card to adjust voltage and delay, allowing Vcc and setup and hold margins to be tested.
    Type: Grant
    Filed: October 30, 2000
    Date of Patent: February 26, 2002
    Assignee: Kingston Technology Co.
    Inventors: Ramon S. Co, Tat Leung Lai, Thang Nguyen