Patents by Inventor Tat Wei Chua

Tat Wei Chua has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9831304
    Abstract: Integrated circuits and methods of producing such integrated circuits are provided. In an exemplary embodiment, a method of producing an integrated circuit includes determining a guard ring width within an integrated circuit design layout, where a guard ring with the guard ring width surrounds an active area in the integrated circuit design layout. A deep trench location is calculated for replacing the guard ring, where the deep trench location depends on the guard ring width. The guard ring in the integrated circuit design layout is replaced with a deep trench having the deep trench location. The deep trench is formed within a substrate at the deep trench location, where the deep trench surrounds the active area.
    Type: Grant
    Filed: September 21, 2016
    Date of Patent: November 28, 2017
    Assignee: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
    Inventors: Mun Tat Yap, Shiang Yang Ong, Namchil Mun, Tat Wei Chua, Raj Verma Purakh, Jeoung Mo Koo
  • Patent number: 7089522
    Abstract: A design, device, system and process for placing slots in active regions (e.g., metal areas). Embodiments of the present invention improve the planarization of metal areas (e.g., lines) and insulators by reducing depressions (e.g., dishing) in the metal areas by including symmetric or square slots inside selected wide metal lines, by adhering to a set of placement rules. Embodiments reduce dishing in copper dual damascene structures. Embodiments reduce data processing requirements for designing and arranging the layout of IC devices and the slots.
    Type: Grant
    Filed: June 11, 2003
    Date of Patent: August 8, 2006
    Assignee: Chartered Semiconductor Manufacturing, Ltd.
    Inventors: Patrick Tan, Kheng Chok Tee, David Vigar, Tat Wei Chua
  • Publication number: 20040255259
    Abstract: A design, device, system and process for placing slots in active regions (e.g., metal areas). Embodiments of the present invention improve the planarization of metal areas (e.g., lines) and insulators by reducing depressions (e.g., dishing) in the metal areas by including symmetric or square slots inside selected wide metal lines, by adhering to a set of placement rules. Embodiments reduce dishing in copper dual damascene structures. Embodiments reduce data processing requirements for designing and arranging the layout of IC devices and the slots.
    Type: Application
    Filed: June 11, 2003
    Publication date: December 16, 2004
    Inventors: Patrick Tan, Kheng Chok Tee, David Vigar, Tat Wei Chua