Patents by Inventor Tatsufumi HAMADA

Tatsufumi HAMADA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11950414
    Abstract: According to one embodiment, a memory device includes a substrate; a structure including a plurality of conductive layers stacked on the substrate; and a pillar arranged inside the structure and including a semiconductor layer that extends in a direction perpendicular to a surface of the substrate. The semiconductor layer includes a first portion on a side of an upper portion of the structure, and a second portion between the first portion and the substrate. The first portion has a thickness larger than a thickness of the second portion.
    Type: Grant
    Filed: November 30, 2020
    Date of Patent: April 2, 2024
    Assignee: Kioxia Corporation
    Inventors: Yasuhiro Uchimura, Tatsufumi Hamada, Shinichi Sotome, Tomohiro Kuki, Yasunori Oshima, Osamu Arisumi
  • Publication number: 20240090222
    Abstract: A semiconductor memory device includes a stacked body in which a first insulating layer and a first conductive layer are alternately stacked in a first direction. A columnar body includes a first insulating portion extending in the first direction in the stacked body, a first semiconductor portion provided between the first insulating portion and the stacked body, and a third insulating portion provided between a second insulating portion provided between the first semiconductor portion and the stacked body, and the second insulating portion and the stacked body, and has a first end and a second end opposite to the first end. A second conductive layer is provided on the stacked body and is electrically connected to the first semiconductor portion at the first end of the columnar body.
    Type: Application
    Filed: September 1, 2023
    Publication date: March 14, 2024
    Inventors: Tatsufumi HAMADA, Yosuke MITSUNO, Tomohiro KUKI, Yusuke MORIKAWA, Ryouji MASUDA, Hiroyasu SATO
  • Patent number: 11854971
    Abstract: A semiconductor storage device includes: conductive layers arranged in a first direction; a first insulating layer extending in the first direction; a first semiconductor layer between the conductive layers and the first insulating layer; and a gate insulating film between the conductive layers and the first semiconductor layer. The first semiconductor layer includes a first region between a first insulating portion and the first conductive layer, a second region between a second insulating portion and the second conductive layer, and a third region between the first region and the second region. The third region includes a fourth region extending in a second direction, a fifth region between the first region and the fourth region, a sixth region between the second region and the fourth region, and a seventh region between the fifth region and the first region and extending in the first direction.
    Type: Grant
    Filed: March 3, 2021
    Date of Patent: December 26, 2023
    Assignee: KIOXIA CORPORATION
    Inventors: Yosuke Mitsuno, Tatsufumi Hamada, Shinichi Sotome, Tomohiro Kuki
  • Patent number: 11791279
    Abstract: A semiconductor device according to an embodiment includes a stacked body having first films and second films that are alternately stacked, a light shielding film provided in a specific layer of the stacked body and having a higher optical absorptivity than that of the second films, and a channel film extending in the stacked body in the stacking direction. The channel film includes a first part located on an upper side than the light shielding film in the stacking direction and containing a monocrystalline semiconductor.
    Type: Grant
    Filed: September 14, 2020
    Date of Patent: October 17, 2023
    Assignee: Kioxia Corporation
    Inventors: Tatsunori Isogai, Masaki Noguchi, Tatsufumi Hamada, Shinichi Sotome
  • Publication number: 20230309303
    Abstract: A semiconductor memory device includes a substrate, a layer stack, and a pillar. The layer stack is in a first direction above the substrate. The pillar penetrates the layer stack in the first direction. The layer stack includes a first conductor and a first insulator on an upper surface of the first conductor along the first direction. The pillar includes a second insulator extending along an extending direction of the pillar. The second insulator includes a first part located in a first layer in which the first conductor is located and a second part located in a second layer in which the first insulator is located. The first part includes a portion thicker than the second part. A diameter of the pillar in the first layer is larger than a diameter of the pillar in the second layer.
    Type: Application
    Filed: September 2, 2022
    Publication date: September 28, 2023
    Applicant: Kioxia Corporation
    Inventors: Yusuke MORIKAWA, Tatsufumi HAMADA, Tomohiro KUKI, Yosuke MITSUNO
  • Publication number: 20230292518
    Abstract: In one embodiment, a method of manufacturing a semiconductor device includes forming a stacked film alternately including first layers and second layers in a first direction, forming a hole extending in the first direction in the stacked film, and forming a first insulator on a side face of the stacked film in the hole. The method further includes removing the first insulator in the hole to expose a first part of the side face of the stacked film at a predetermined height in the first direction of the hole and to expose a side face of the first insulator remaining on a second part of the side face of the stacked film at the predetermined height. The method further includes forming a second insulator on the first part of the side face of the stacked film and the side face of the remaining first insulator in the hole.
    Type: Application
    Filed: June 16, 2022
    Publication date: September 14, 2023
    Applicant: Kioxia Corporation
    Inventors: Tatsufumi HAMADA, Yosuke MITSUNO, Tomohiro KUKI, Yusuke MORIKAWA
  • Patent number: 11721625
    Abstract: A semiconductor storage device includes: conductive layers arranged in a first direction; a first insulating layer extending in the first direction; a first semiconductor layer between the conductive layers and the first insulating layer; and a gate insulating film between the conductive layers and the first semiconductor layer. The first semiconductor layer includes a first region between a first insulating portion and the first conductive layer, a second region between a second insulating portion and the second conductive layer, and a third region between the first region and the second region. The third region includes a fourth region extending in a second direction, a fifth region between the first region and the fourth region, a sixth region between the second region and the fourth region, and a seventh region between the fifth region and the first region and extending in the first direction.
    Type: Grant
    Filed: March 3, 2021
    Date of Patent: August 8, 2023
    Assignee: KIOXIA CORPORATION
    Inventors: Yosuke Mitsuno, Tatsufumi Hamada, Shinichi Sotome, Tomohiro Kuki
  • Publication number: 20230093316
    Abstract: A semiconductor storage device according to an embodiment includes a stacked body and a pillar. The pillar includes an insulating core, a channel layer, and a memory film. A plurality of gate electrode layers included in the stacked body includes a plurality of first gate electrode layers and one or more second gate electrode layers. The channel layer includes a first portion and a second portion. The first portion is provided between an uppermost first gate electrode layer and the insulating core. The second portion extends from a first height to a second height. A film thickness of the second portion is greater than a film thickness of the first portion.
    Type: Application
    Filed: March 14, 2022
    Publication date: March 23, 2023
    Applicant: Kioxia Corporation
    Inventors: Tomohiro KUKI, Tatsufumi HAMADA, Shinichi SOTOME, Yosuke MITSUNO
  • Patent number: 11587942
    Abstract: According to one embodiment, a semiconductor memory device includes: a substrate; a semiconductor above the substrate functioning as a channel of a cell transistor; a first silicon nitride layer above the semiconductor having an internal compressive stress of a first value; and a second silicon nitride layer above the first silicon nitride layer having an internal compressive stress of a second value. The second value is greater than the first value.
    Type: Grant
    Filed: August 6, 2020
    Date of Patent: February 21, 2023
    Assignee: Kioxia Corporation
    Inventors: Tomohiro Kuki, Tatsufumi Hamada
  • Publication number: 20220302138
    Abstract: A semiconductor storage device includes a first stacked body, a second stacked body, an intermediate insulating layer, and a plurality of columnar bodies. The intermediate insulating layer is located between a first stacked body and a second stacked body and has a thickness in the stacking direction larger than that of one insulating layer in the plurality of insulating layers of the first stacked body. The plurality of columnar bodies are provided over the first stacked body and the second stacked body, and each columnar body includes a semiconductor body, a charge storage film provided between at least one of the plurality of conductive layers and the semiconductor body, and a semiconductor film. Each of the plurality of columnar bodies include a first columnar portion formed in the first stacked body, a second columnar portion formed in the intermediate insulating layer, and a third columnar portion formed in the second stacked body.
    Type: Application
    Filed: September 1, 2021
    Publication date: September 22, 2022
    Inventors: Yosuke MITSUNO, Tatsufumi HAMADA, Shinichi SOTOME, Tomohiro KUKI
  • Publication number: 20220278124
    Abstract: A semiconductor device includes: a first stacked film including first electrode layers; an insulating layer provided on the first stacked film; a second stacked film provided on the insulating layer and including second electrode layers; and a columnar portion extending through the first stacked film, the insulating layer, and the second stacked film. The columnar portion extending in the insulating layer includes a first portion having a first width in a second direction intersecting the first direction, and a second portion provided at a different location along the first direction and having a second width in the second direction. The columnar portion extending in the second stacked film includes a third portion having a third width along the second direction. The second width is larger than the first width and the third width.
    Type: Application
    Filed: August 27, 2021
    Publication date: September 1, 2022
    Applicant: Kioxia Corporation
    Inventors: Tatsufumi HAMADA, Tomohiro KUKI, Yosuke MUTSUNO, Shinichi SOTOME, Ryota SUZUKI
  • Patent number: 11296111
    Abstract: According to one embodiment, a semiconductor memory device includes a stacked body of first conductor layers and second conductor layers. A pillar including a semiconductor layer extends along through the stacked body in a first direction. A charge storage layer is between the conductor layers and the semiconductor layer. The semiconductor layer includes a first portion extending along the first direction from an uppermost first conductor layer to a lowermost second conductor layer and a second portion above the first portion in the first direction. The second portion has a diameter that decreases with increasing distance along the first direction from the first portion.
    Type: Grant
    Filed: February 25, 2020
    Date of Patent: April 5, 2022
    Assignee: KIOXIA CORPORATION
    Inventors: Yosuke Mitsuno, Tatsufumi Hamada, Shinichi Sotome, Tomohiro Kuki, Yuya Akeboshi
  • Patent number: 11282853
    Abstract: According to one embodiment, a semiconductor memory device includes a base layer, conductive layers, an insulation layer, a semiconductor layer and a charge storage layer. The conductive layers are stacked above the base layer in a first direction. The insulation layer is extending in the conductive layers in the first direction. The semiconductor layer is arranged between the insulation layer and the conductive layers. The charge storage layer is arranged between the semiconductor layer and the conductive layers. The insulation layer includes a first insulation layer arranged on a side of the base layer and containing polysilazane and a second insulation layer arranged on the first insulation layer on a side opposite from the base layer.
    Type: Grant
    Filed: September 4, 2019
    Date of Patent: March 22, 2022
    Assignee: KIOXIA CORPORATION
    Inventors: Shinichi Sotome, Tatsufumi Hamada, Yasuhiro Uchimura, Tomohiro Kuki
  • Publication number: 20220068964
    Abstract: According to one embodiment, a semiconductor storage device includes a substrate, a first electric charge holder, and a channel layer. At least a part of the first electric charge holder is curved in a first cross section along a surface of the substrate. The channel layer is inside the first electric charge holder in the first cross section. At least a part of the channel layer is curved in the first cross section. The first electric charge holder has a curvature varying in accordance with a position in the first cross section. The channel layer has a film thickness varying in accordance with the curvature of the first electric charge holder in the first cross section.
    Type: Application
    Filed: March 17, 2021
    Publication date: March 3, 2022
    Applicant: Kioxia Corporation
    Inventors: Tomohiro KUKI, Tatsufumi HAMADA, Shinichi SOTOME, Yosuke MITSUNO, Muneyuki TSUDA
  • Publication number: 20210366830
    Abstract: A device includes a first semiconductor layer that includes a first region provided between a first insulating portion and first conductive layers, a second region provided between a second insulating portion and second conductive layers, and a third region provided between the first region and the second region. A first insulating layer includes a thickness (t1) from a surface in the first region to a gate insulating film. The first insulating layer includes a thickness (t2) from a surface in the second region to the gate insulating film. The first insulating layer includes a thickness (t3) from a surface in the third region to the gate insulating film, which is larger than t1-2 nanometers (nm), and larger than t2-2 nm.
    Type: Application
    Filed: March 3, 2021
    Publication date: November 25, 2021
    Inventors: Yosuke MITSUNO, Tatsufumi HAMADA, Shinichi SOTOME, Tomohiro KUKI
  • Patent number: 11158649
    Abstract: A semiconductor storage device includes a stacked body and a columnar body. The stacked body includes a plurality of conductive layers and a plurality of insulating layers that are alternately stacked in a first direction. The columnar body extends through the stacked body in the first direction and includes a core portion, a channel film, a tunnel oxide film, and a charge storage film in this order from a center portion thereof. The channel film has a first region in contact with the core portion and a second region in contact with the tunnel oxide film. The first region is a semiconductor doped with impurities. The second region is a semiconductor. A concentration of the impurities in the second region is lower than that in the first region.
    Type: Grant
    Filed: September 3, 2019
    Date of Patent: October 26, 2021
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Shinichi Sotome, Tatsufumi Hamada
  • Publication number: 20210287998
    Abstract: A semiconductor device according to an embodiment comprises a stacked body comprising first films and second films that are alternately stacked, a light shielding film provided in a specific layer of the stacked body and having a higher optical absorptivity than that of the second films, and a channel film extending in the stacked body in the stacking direction. The channel film comprises a first part located on an upper side than the light shielding film in the stacking direction and containing a monocrystalline semiconductor.
    Type: Application
    Filed: September 14, 2020
    Publication date: September 16, 2021
    Applicant: Kioxia Corporation
    Inventors: Tatsunori ISOGAI, Masaki NOGUCHI, Tatsufumi HAMADA, Shinichi SOTOME
  • Publication number: 20210082940
    Abstract: According to one embodiment, a memory device includes a substrate; a structure including a plurality of conductive layers stacked on the substrate; and a pillar arranged inside the structure and including a semiconductor layer that extends in a direction perpendicular to a surface of the substrate. The semiconductor layer includes a first portion on a side of an upper portion of the structure, and a second portion between the first portion and the substrate. The first portion has a thickness larger than a thickness of the second portion.
    Type: Application
    Filed: November 30, 2020
    Publication date: March 18, 2021
    Applicant: Kioxia Corporation
    Inventors: Yasuhiro UCHIMURA, Tatsufumi HAMADA, Shinichi SOTOME, Tomohiro KUKI, Yasunori OSHIMA, Osamu ARISUMI
  • Publication number: 20210028189
    Abstract: According to one embodiment, a semiconductor memory device includes a stacked body of first conductor layers and second conductor layers. A pillar including a semiconductor layer extends along through the stacked body in a first direction. A charge storage layer is between the conductor layers and the semiconductor layer. The semiconductor layer includes a first portion extending along the first direction from an uppermost first conductor layer to a lowermost second conductor layer and a second portion above the first portion in the first direction. The second portion has a diameter that decreases with increasing distance along the first direction from the first portion.
    Type: Application
    Filed: February 25, 2020
    Publication date: January 28, 2021
    Inventors: Yosuke MITSUNO, Tatsufumi HAMADA, Shinichi SOTOME, Tomohiro KUKI, Yuya AKEBOSHI
  • Publication number: 20200381444
    Abstract: According to one embodiment, a semiconductor memory device includes: a substrate; a semiconductor above the substrate functioning as a channel of a cell transistor; a first silicon nitride layer above the semiconductor having an internal compressive stress of a first value; and a second silicon nitride layer above the first silicon nitride layer having an internal compressive stress of a second value. The second value is greater than the first value.
    Type: Application
    Filed: August 6, 2020
    Publication date: December 3, 2020
    Applicant: Toshiba Memory Corporation
    Inventors: Tomohiro KUKI, Tatsufumi Hamada