Patents by Inventor Tatsuharu Matsuda

Tatsuharu Matsuda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device with reliable electrodes of projecting shape and method of forming same
    Patent number: 5937277
    Abstract: A method of forming a semiconductor device having a semiconductor chip having electrodes on which electrode pins are formed includes the steps of forming a complex having the electrode pins fixed in a fixing member, an arrangement of the electrode pins corresponding to that of the electrodes, connecting the electrode pins with the electrodes by mounting the complex on the semiconductor chip, and removing the fixing member from the complex mounted on the semiconductor chip.
    Type: Grant
    Filed: March 10, 1997
    Date of Patent: August 10, 1999
    Assignee: Fujitsu Limited
    Inventors: Tatsuharu Matsuda, Masataka Mizukoshi, Masaharu Minamizawa, Toshiyuki Motooka
  • Test board for testing a semiconductor device and method of testing the semiconductor device
    Patent number: 5854558
    Abstract: A test board used for testing a semiconductor device provided with projection electrodes includes a main board and testing electrodes. The testing electrodes are provided on the main board, each projecting upwardly from the main board. When the semiconductor device is tested, the testing electrodes are electrically connected to the projection electrodes by insertion of the testing electrodes into the projection electrodes. The semiconductor device is mounted on the main board to test the semiconductor device through the testing electrodes.
    Type: Grant
    Filed: September 21, 1995
    Date of Patent: December 29, 1998
    Assignee: Fujitsu Limited
    Inventors: Toshiyuki Motooka, Syuichirou Takahashi, Tatsuharu Matsuda, Kunio Kodama, Jouji Fujimori
  • Method for manufacturing semiconductor device having step of forming electrode pins on semiconductor chip using electrode-pin forming mask, and method for testing semiconductor chip using electrode-pin forming mask
    Patent number: 5843798
    Abstract: An electrode-pin forming mask is used to form electrode pins on the semiconductor chip. The electrode-pin forming mask has electrode-pin forming holes matching electrode pads previously formed on the semiconductor chip. A screen-printing technique is used to form the electrode pins on the semiconductor chip through the electrode-pin forming mask. That is, conductive material in a paste state is pushed into the electrode-pin forming holes in a condition where the electrode-pin forming mask has been placed on the semiconductor chip and positions of the electrode-pin forming holes match positions of the electrode pads of the semiconductor chip, respectively. The conductor material thus pushed into the electrode-pin forming holes is thus shaped as to form the electrode pins projecting from the electrode pads of the semiconductor chip.
    Type: Grant
    Filed: August 12, 1996
    Date of Patent: December 1, 1998
    Assignee: Fujitsu Limited
    Inventor: Tatsuharu Matsuda
  • Test board for testing a semiconductor device, method of testing the semiconductor device, contact device, test method using the contact device, and test jig for testing the semiconductor device
    Patent number: 5831441
    Abstract: A test board used for testing a semiconductor device provided with projection electrodes includes a main board and testing electrodes. The testing electrodes are provided on the main board, each projecting upwardly from the main board. When the semiconductor device is tested, the testing electrodes are electrically connected to the projection electrodes by insertion of the testing electrodes into the projection electrodes. The semiconductor device is mounted on the main board to test the semiconductor device through the testing electrodes.
    Type: Grant
    Filed: March 8, 1996
    Date of Patent: November 3, 1998
    Assignee: Fujitsu Limited
    Inventors: Toshiyuki Motooka, Syuichirou Takahasi, Tatsuharu Matsuda, Kunio Kodama, Joji Fujimori, Shigeki Harada, Masataka Mizukoshi, Masashi Takenaka, Tatsuro Yamashita
  • Bump electrode, semiconductor integrated circuit device using the same, multi-chip module having the semiconductor integrated circuit devices and method for producing semicondutcor device having the bump electrode
    Patent number: 5666270
    Abstract: A bump electrode includes a core portion provided on an intermediate electrode layer formed on an electrode pad formed on a surface of an element. The core portion contains a material having a Young's modulus less than that of soldering. An electrically conductive film covers the core portion.
    Type: Grant
    Filed: July 25, 1994
    Date of Patent: September 9, 1997
    Assignee: Fujitsu Limited
    Inventors: Tatsuharu Matsuda, Masaharu Minamizawa
  • Semiconductor device with reliable electrodes of projecting shape and method of forming same
    Patent number: 5637535
    Abstract: A method of forming a semiconductor device having a semiconductor chip having electrodes on which electrode pins are formed includes the steps of forming a complex having the electrode pins fixed in a fixing member, an arrangement of the electrode pins corresponding to that of the electrodes, connecting the electrode pins with the electrodes by mounting the complex on the semiconductor chip, and removing the fixing member from the complex mounted on the semiconductor chip.
    Type: Grant
    Filed: January 11, 1995
    Date of Patent: June 10, 1997
    Assignee: Fujitsu Limited
    Inventors: Tatsuharu Matsuda, Masataka Mizukoshi, Masaharu Minamizawa, Toshiyuki Motooka
  • Projection-electrode fabrication method
    Patent number: 5607877
    Abstract: A projection-electrode fabrication method having the steps of: (a) fabricating at least one projection electrode directly on a substrate; and (b) forming a semiconductor circuit layer adjacent to the projection electrode on the substrate so as to contact at least one projection electrode after the step of fabricating the projection electrode. The projection electrode is projected higher as compared to the semiconductor circuit layer.
    Type: Grant
    Filed: October 6, 1994
    Date of Patent: March 4, 1997
    Assignee: Fujitsu Limited
    Inventors: Tatsuharu Matsuda, Masaharu Minamizawa
  • Device having pins formed of hardened mixture of conductive metal particle and resin
    Patent number: 5574311
    Abstract: An electrode-pin forming mask is used to form electrode pins on the semiconductor chip. The electrode-pin forming mask has electrode-pin forming holes matching electrode pads previously formed on the semiconductor chip. A screen-printing technique is used to form the electrode pins on the semiconductor chip through the electrode-pin forming mask. That is, conductive material in a paste state is pushed into the electrode-pin forming holes in a condition where the electrode-pin forming mask has been placed on the semiconductor chip and positions of the electrode-pin forming holes match positions of the electrode pads of the semiconductor chip, respectively. The conductor material thus pushed into the electrode-pin forming holes is thus shaped as to form the electrode pins projecting from the electrode pads of the semiconductor chip.
    Type: Grant
    Filed: November 29, 1994
    Date of Patent: November 12, 1996
    Assignee: Fujitsu Limited
    Inventor: Tatsuharu Matsuda