Patents by Inventor Tatsuhiko Akiyama
Tatsuhiko Akiyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10676366Abstract: At least one embodiment of the present disclosure provides a hydrogenated silane composition containing a cyclic hydrogenated silane having high storage stability. The at least one embodiment of the present disclosure relates to a hydrogenated silane composition, wherein a content ratio of a linear hydrogenated silane having Si atoms of 5 or less to a cyclic hydrogenated silane having Si atoms of 5 to 7 is 0.009 or less, wherein the cyclic hydrogenated silane comprises at least cyclohexasilane, and further comprises at least one cyclic hydrogenated silane having a branched silyl group selected from silylcyclopentasilane and silylcyclohexasilane, and wherein a content ratio of a total of the silylcyclopentasilane and the silylcyclohexasilane to the cyclic hydrogenated silane having Si atoms of 5 to 7 is 10 ppb or more on a mass basis.Type: GrantFiled: August 23, 2018Date of Patent: June 9, 2020Assignee: NIPPON SHOKUBAI CO., LTD.Inventors: Takashi Abe, Chiho Mizushima, Tatsuhiko Akiyama, Takuya Kamiyama
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Patent number: 10676365Abstract: At least one embodiment of the present disclosure provides a hydrogenated silane composition containing cyclohexasilane of a cyclic hydrogenated silane having high storage stability. The at least one embodiment of the present disclosure relates to a hydrogenated silane composition, wherein a content ratio of normal hexasilane and silylcyclopentasilane to cyclohexasilane is 0.0020 or less on a mass basis.Type: GrantFiled: August 23, 2018Date of Patent: June 9, 2020Assignee: NIPPON SHOKUBAI CO., LTD.Inventors: Takashi Abe, Tatsuhiko Akiyama
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Publication number: 20190135641Abstract: At least one embodiment of the present disclosure provides a hydrogenated silane composition containing cyclohexasilane of a cyclic hydrogenated silane having high storage stability. The at least one embodiment of the present disclosure relates to a hydrogenated silane composition, wherein a content ratio of normal hexasilane and silylcyclopentasilane to cyclohexasilane is 0.0020 or less on a mass basis.Type: ApplicationFiled: August 23, 2018Publication date: May 9, 2019Applicant: NIPPON SHOKUBAI CO., LTD.Inventors: Takashi ABE, Tatsuhiko AKIYAMA
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Publication number: 20190135642Abstract: At least one embodiment of the present disclosure provides a hydrogenated silane composition containing a cyclic hydrogenated silane having high storage stability. The at least one embodiment of the present disclosure relates to a hydrogenated silane composition, wherein a content ratio of a linear hydrogenated silane having Si atoms of 5 or less to a cyclic hydrogenated silane having Si atoms of 5 to 7 is 0.009 or less, wherein the cyclic hydrogenated silane comprises at least cyclohexasilane, and further comprises at least one cyclic hydrogenated silane having a branched silyl group selected from silylcyclopentasilane and silylcyclohexasilane, and wherein a content ratio of a total of the silylcyclopentasilane and the silylcyclohexasilane to the cyclic hydrogenated silane having Si atoms of 5 to 7 is 10 ppb or more on a mass basis.Type: ApplicationFiled: August 23, 2018Publication date: May 9, 2019Applicant: NIPPON SHOKUBAI CO., LTD.Inventors: Takashi ABE, Chiho MIZUSHIMA, Tatsuhiko AKIYAMA, Takuya KAMIYAMA
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Patent number: 9764961Abstract: High purity cyclohexasilane and a method for increasing the purification efficiency thereto are provided. The method for producing cyclohexasilane of the present invention is characterized in that, in distilling crude cyclohexasilane to obtain purified cyclohexasilane, the absolute pressure during distillation is set to 2 kPa or less, and the heating temperature of crude cyclohexasilane is set to 25 to 100° C. The cyclohexasilane of the present invention contains pure cyclohexasilane at a rate of 98% by mass or more and 100% by mass or less.Type: GrantFiled: February 21, 2017Date of Patent: September 19, 2017Assignee: NIPPON SHOKUBAI CO., LTD.Inventors: Shin-ya Imoto, Takashi Abe, Morihiro Kitamura, Hikaru Takahashi, Takehiko Morita, Tatsuhiko Akiyama
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Publication number: 20170158518Abstract: High purity cyclohexasilane and a method for increasing the purification efficiency thereto are provided. The method for producing cyclohexasilane of the present invention is characterized in that, in distilling crude cyclohexasilane to obtain purified cyclohexasilane, the absolute pressure during distillation is set to 2 kPa or less, and the heating temperature of crude cyclohexasilane is set to 25 to 100° C. The cyclohexasilane of the present invention contains pure cyclohexasilane at a rate of 98% by mass or more and 100% by mass or less.Type: ApplicationFiled: February 21, 2017Publication date: June 8, 2017Applicant: NIPPON SHOKUBAI CO., LTD.Inventors: Shin-ya IMOTO, Takashi ABE, Morihiro KITAMURA, Hikaru TAKAHASHI, Takehiko MORITA, Tatsuhiko AKIYAMA
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Patent number: 9617161Abstract: High purity cyclohexasilane and a method for increasing the purification efficiency thereto are provided. The method for producing cyclohexasilane of the present invention is characterized in that, in distilling crude cyclohexasilane to obtain purified cyclohexasilane, the absolute pressure during distillation is set to 2 kPa or less, and the heating temperature of crude cyclohexasilane is set to 25 to 100° C. The cyclohexasilane of the present invention contains pure cyclohexasilane at a rate of 98% by mass or more and 100% by mass or less.Type: GrantFiled: December 23, 2013Date of Patent: April 11, 2017Assignee: NIPPON SHOKUBAI CO., LTD.Inventors: Shin-ya Imoto, Takashi Abe, Morihiro Kitamura, Hikaru Takahashi, Takehiko Morita, Tatsuhiko Akiyama
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Publication number: 20140219893Abstract: High purity cyclohexasilane and a method for increasing the purification efficiency thereto are provided. The method for producing cyclohexasilane of the present invention is characterized in that, in distilling crude cyclohexasilane to obtain purified cyclohexasilane, the absolute pressure during distillation is set to 2 kPa or less, and the heating temperature of crude cyclohexasilane is set to 25 to 100° C. The cyclohexasilane of the present invention contains pure cyclohexasilane at a rate of 98% by mass or more and 100% by mass or less.Type: ApplicationFiled: December 23, 2013Publication date: August 7, 2014Applicant: Nippon Shokubai Co., Ltd.Inventors: Shin-ya IMOTO, Takashi ABE, Morihiro KITAMURA, Hikaru TAKAHASHI, Takehiko MORITA, Tatsuhiko AKIYAMA
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Patent number: 8652880Abstract: To provide a technique that can improve the data retention characteristic of an MRAM device by improving the resistance against an external magnetic field in a semiconductor device including the MRAM device. A first magnetic shield material is disposed over a die pad via a first die attach film. Then, a semiconductor chip is mounted over the first magnetic shield material via a second die attach film. Furthermore, a second magnetic shield material is disposed over the semiconductor chip via a third die attach film. That is, the semiconductor chip is disposed so as to be sandwiched by the first magnetic shield material and the second magnetic shield material. At this time, while the planar area of the second magnetic shield material is smaller than that of the first magnetic shield material, the thickness of the second magnetic shield material is thicker than that of the first magnetic shield material.Type: GrantFiled: August 10, 2012Date of Patent: February 18, 2014Assignee: Renesas Electronics CorporationInventors: Koji Bando, Kazuyuki Misumi, Tatsuhiko Akiyama, Naoki Izumi, Akira Yamazaki
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Patent number: 8524510Abstract: A method for manufacturing a magnetic memory chip device comprises the steps of: writing information in each of a plurality of magnetic memory chips formed on a silicon wafer; adhering a high magnetic permeability plate on a back face of the silicon wafer after writing information, the high magnetic permeability plate having a higher magnetic permeability than silicon and having a thickness of 50 um or more; dicing the silicon wafer into respective magnetic memory chips after adhering the high magnetic permeability plate.Type: GrantFiled: January 18, 2012Date of Patent: September 3, 2013Assignee: Renesas Electronics CorporationInventors: Kazuyuki Misumi, Masahiro Shimizu, Tsuyoshi Koga, Tatsuhiko Akiyama, Tomohiro Murakami
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Publication number: 20120309131Abstract: To provide a technique that can improve the data retention characteristic of an MRAM device by improving the resistance against an external magnetic field in a semiconductor device including the MRAM device. A first magnetic shield material is disposed over a die pad via a first die attach film. Then, a semiconductor chip is mounted over the first magnetic shield material via a second die attach film. Furthermore, a second magnetic shield material is disposed over the semiconductor chip via a third die attach film. That is, the semiconductor chip is disposed so as to be sandwiched by the first magnetic shield material and the second magnetic shield material. At this time, while the planar area of the second magnetic shield material is smaller than that of the first magnetic shield material, the thickness of the second magnetic shield material is thicker than that of the first magnetic shield material.Type: ApplicationFiled: August 10, 2012Publication date: December 6, 2012Inventors: KOJI BANDO, KAZUYUKI MISUMI, TATSUHIKO AKIYAMA, NAOKI IZUMI, AKIRA YAMAZAKI
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Patent number: 8258604Abstract: To provide a technique that can improve the data retention characteristic of an MRAM device by improving the resistance against an external magnetic field in a semiconductor device including the MRAM device. A first magnetic shield material is disposed over a die pad via a first die attach film. Then, a semiconductor chip is mounted over the first magnetic shield material via a second die attach film. Furthermore, a second magnetic shield material is disposed over the semiconductor chip via a third die attach film. That is, the semiconductor chip is disposed so as to be sandwiched by the first magnetic shield material and the second magnetic shield material. At this time, while the planar area of the second magnetic shield material is smaller than that of the first magnetic shield material, the thickness of the second magnetic shield material is thicker than that of the first magnetic shield material.Type: GrantFiled: December 26, 2009Date of Patent: September 4, 2012Assignee: Renesas Electronics CorporationInventors: Koji Bando, Kazuyuki Misumi, Tatsuhiko Akiyama, Naoki Izumi, Akira Yamazaki
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Publication number: 20120122246Abstract: A method for manufacturing a magnetic memory chip device comprises the steps of: writing information in each of a plurality of magnetic memory chips formed on a silicon wafer; adhering a high magnetic permeability plate on a back face of the silicon wafer after writing information, the high magnetic permeability plate having a higher magnetic permeability than silicon and having a thickness of 50 um or more; dicing the silicon wafer into respective magnetic memory chips after adhering the high magnetic permeability plate.Type: ApplicationFiled: January 18, 2012Publication date: May 17, 2012Applicant: Renesas Electronics CorporationInventors: Kazuyuki MISUMI, Masahiro Shimizu, Tsuyoshi Koga, Tatsuhiko Akiyama, Tomohiro Murakami
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Patent number: 8124425Abstract: A method for manufacturing a magnetic memory chip device comprises the steps of: writing information in each of a plurality of magnetic memory chips formed on a silicon wafer; adhering a high magnetic permeability plate on a back face of the silicon wafer after writing information, the high magnetic permeability plate having a higher magnetic permeability than silicon and having a thickness of 50 ?m or more; dicing the silicon wafer into respective magnetic memory chips after adhering the high magnetic permeability plate.Type: GrantFiled: February 21, 2008Date of Patent: February 28, 2012Assignee: Renesas Electronics CorporationInventors: Kazuyuki Misumi, Masahiro Shimizu, Tsuyoshi Koga, Tatsuhiko Akiyama, Tomohiro Murakami
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Publication number: 20100164077Abstract: To provide a technique that can improve the data retention characteristic of an MRAM device by improving the resistance against an external magnetic field in a semiconductor device including the MRAM device. A first magnetic shield material is disposed over a die pad via a first die attach film. Then, a semiconductor chip is mounted over the first magnetic shield material via a second die attach film. Furthermore, a second magnetic shield material is disposed over the semiconductor chip via a third die attach film. That is, the semiconductor chip is disposed so as to be sandwiched by the first magnetic shield material and the second magnetic shield material. At this time, while the planar area of the second magnetic shield material is smaller than that of the first magnetic shield material, the thickness of the second magnetic shield material is thicker than that of the first magnetic shield material.Type: ApplicationFiled: December 26, 2009Publication date: July 1, 2010Inventors: Koji Bando, Kazuyuki Misumi, Tatsuhiko Akiyama, Naoki Izumi, Akira Yamazaki
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Patent number: 6583511Abstract: A laminated semiconductor chip assembly fabricated by fixing back surfaces of first and second semiconductor chips, respectively having principal surfaces and back surfaces, to each other. Each of the principal surfaces of the laminated semiconductor chip assembly is fixed to a corresponding surface of a lead frame. A standing linear portion of a metallic wire on a ball bond side is pulled parallel to a side surface of the semiconductor chip in its thickness direction and a side surface of the inner lead in its thickness direction, and subjected to wire bonding. The formed semiconductor chip assembly is covered by a sealing resin so that an outer lead protrudes from the sealing resin. Thus, the semiconductor device can be made thin, cost can be reduced, and quality can be improved to increase capacities of electronic equipment.Type: GrantFiled: July 13, 2001Date of Patent: June 24, 2003Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Kazunari Michii, Tatsuhiko Akiyama
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Patent number: 6545366Abstract: In order to reduce the thickness of a semiconductor device and double its capacity, two center pad semiconductor chips stacked one on the other, back to back, are fixed to one face of a wiring substrate. The difference in the length of routing between external lands and fingers is minimized, and each of the center pads and corresponding fingers are connected via metal wires having a high conductivity. The main face of a first center pad semiconductor chip is fixed to the wiring substrate that has first and second wired faces and a through opening. The back face of the first semiconductor chip and the back face of a second semiconductor chip are fixed to each other using a bonding material. The pads on each semiconductor chip are connected to corresponding fingers on the wiring substrate via metal wires. One face of the wiring substrate is sealed with a sealing resin, and on the other face, an area in the vicinity of the through opening is sealed.Type: GrantFiled: June 25, 2001Date of Patent: April 8, 2003Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Kazunari Michii, Tatsuhiko Akiyama
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Publication number: 20020173076Abstract: A laminated semiconductor chip fabricated by fixing back surfaces of first and second semiconductor chips, respectively having a principle surface and the back surface, to each other. Each of the principle surfaces of the laminated semiconductor chip is fixed to a corresponding surface of a lead frame. A standing linear portion of a metallic wire on a ball bond side is pulled up in parallel with a side surface of the semiconductor chip in its thickness direction and a side surface of the inner lead in its thickness direction, and subjected to wire bonding. Thus formed semiconductor chip is covered by a sealing resin material so that an outer lead protrudes from a side surface of the sealing resin. Thus, the thickness of the semiconductor device can be made thin, a cost can be reduced, and a quality can be improved to deal with a tendency of increments of capacities of electronic equipments.Type: ApplicationFiled: July 13, 2001Publication date: November 21, 2002Applicant: Mitsubishi Denki Kabushiki KaishaInventors: Kazunari Michii, Tatsuhiko Akiyama
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Publication number: 20020089050Abstract: In order to reduce the thickness of a semiconductor device and double its capacity, two center pad semiconductor chips stacked one on the other back to back are fixed to one face of a wiring substrate, wherein difference in the length of routing between external lands and fingers is minimized, and each of the center pads and corresponding fingers are connected via metal wires of a high conductivity.Type: ApplicationFiled: June 25, 2001Publication date: July 11, 2002Inventors: Kazunari Michii, Tatsuhiko Akiyama
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Patent number: 6255719Abstract: A boron nitride inclusion sheet is applied on the surface of a mold package enclosing a semiconductor chip so as to prevent soft error caused by a thermal neutron.Type: GrantFiled: December 1, 1998Date of Patent: July 3, 2001Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Hirotada Kuriyama, Kazuhito Tsutsumi, Yutaka Arita, Tatsuhiko Akiyama, Tadafumi Kishimoto