Patents by Inventor Tatsuhiko Akiyama

Tatsuhiko Akiyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10676366
    Abstract: At least one embodiment of the present disclosure provides a hydrogenated silane composition containing a cyclic hydrogenated silane having high storage stability. The at least one embodiment of the present disclosure relates to a hydrogenated silane composition, wherein a content ratio of a linear hydrogenated silane having Si atoms of 5 or less to a cyclic hydrogenated silane having Si atoms of 5 to 7 is 0.009 or less, wherein the cyclic hydrogenated silane comprises at least cyclohexasilane, and further comprises at least one cyclic hydrogenated silane having a branched silyl group selected from silylcyclopentasilane and silylcyclohexasilane, and wherein a content ratio of a total of the silylcyclopentasilane and the silylcyclohexasilane to the cyclic hydrogenated silane having Si atoms of 5 to 7 is 10 ppb or more on a mass basis.
    Type: Grant
    Filed: August 23, 2018
    Date of Patent: June 9, 2020
    Assignee: NIPPON SHOKUBAI CO., LTD.
    Inventors: Takashi Abe, Chiho Mizushima, Tatsuhiko Akiyama, Takuya Kamiyama
  • Patent number: 10676365
    Abstract: At least one embodiment of the present disclosure provides a hydrogenated silane composition containing cyclohexasilane of a cyclic hydrogenated silane having high storage stability. The at least one embodiment of the present disclosure relates to a hydrogenated silane composition, wherein a content ratio of normal hexasilane and silylcyclopentasilane to cyclohexasilane is 0.0020 or less on a mass basis.
    Type: Grant
    Filed: August 23, 2018
    Date of Patent: June 9, 2020
    Assignee: NIPPON SHOKUBAI CO., LTD.
    Inventors: Takashi Abe, Tatsuhiko Akiyama
  • Publication number: 20190135641
    Abstract: At least one embodiment of the present disclosure provides a hydrogenated silane composition containing cyclohexasilane of a cyclic hydrogenated silane having high storage stability. The at least one embodiment of the present disclosure relates to a hydrogenated silane composition, wherein a content ratio of normal hexasilane and silylcyclopentasilane to cyclohexasilane is 0.0020 or less on a mass basis.
    Type: Application
    Filed: August 23, 2018
    Publication date: May 9, 2019
    Applicant: NIPPON SHOKUBAI CO., LTD.
    Inventors: Takashi ABE, Tatsuhiko AKIYAMA
  • Publication number: 20190135642
    Abstract: At least one embodiment of the present disclosure provides a hydrogenated silane composition containing a cyclic hydrogenated silane having high storage stability. The at least one embodiment of the present disclosure relates to a hydrogenated silane composition, wherein a content ratio of a linear hydrogenated silane having Si atoms of 5 or less to a cyclic hydrogenated silane having Si atoms of 5 to 7 is 0.009 or less, wherein the cyclic hydrogenated silane comprises at least cyclohexasilane, and further comprises at least one cyclic hydrogenated silane having a branched silyl group selected from silylcyclopentasilane and silylcyclohexasilane, and wherein a content ratio of a total of the silylcyclopentasilane and the silylcyclohexasilane to the cyclic hydrogenated silane having Si atoms of 5 to 7 is 10 ppb or more on a mass basis.
    Type: Application
    Filed: August 23, 2018
    Publication date: May 9, 2019
    Applicant: NIPPON SHOKUBAI CO., LTD.
    Inventors: Takashi ABE, Chiho MIZUSHIMA, Tatsuhiko AKIYAMA, Takuya KAMIYAMA
  • Patent number: 9764961
    Abstract: High purity cyclohexasilane and a method for increasing the purification efficiency thereto are provided. The method for producing cyclohexasilane of the present invention is characterized in that, in distilling crude cyclohexasilane to obtain purified cyclohexasilane, the absolute pressure during distillation is set to 2 kPa or less, and the heating temperature of crude cyclohexasilane is set to 25 to 100° C. The cyclohexasilane of the present invention contains pure cyclohexasilane at a rate of 98% by mass or more and 100% by mass or less.
    Type: Grant
    Filed: February 21, 2017
    Date of Patent: September 19, 2017
    Assignee: NIPPON SHOKUBAI CO., LTD.
    Inventors: Shin-ya Imoto, Takashi Abe, Morihiro Kitamura, Hikaru Takahashi, Takehiko Morita, Tatsuhiko Akiyama
  • Publication number: 20170158518
    Abstract: High purity cyclohexasilane and a method for increasing the purification efficiency thereto are provided. The method for producing cyclohexasilane of the present invention is characterized in that, in distilling crude cyclohexasilane to obtain purified cyclohexasilane, the absolute pressure during distillation is set to 2 kPa or less, and the heating temperature of crude cyclohexasilane is set to 25 to 100° C. The cyclohexasilane of the present invention contains pure cyclohexasilane at a rate of 98% by mass or more and 100% by mass or less.
    Type: Application
    Filed: February 21, 2017
    Publication date: June 8, 2017
    Applicant: NIPPON SHOKUBAI CO., LTD.
    Inventors: Shin-ya IMOTO, Takashi ABE, Morihiro KITAMURA, Hikaru TAKAHASHI, Takehiko MORITA, Tatsuhiko AKIYAMA
  • Patent number: 9617161
    Abstract: High purity cyclohexasilane and a method for increasing the purification efficiency thereto are provided. The method for producing cyclohexasilane of the present invention is characterized in that, in distilling crude cyclohexasilane to obtain purified cyclohexasilane, the absolute pressure during distillation is set to 2 kPa or less, and the heating temperature of crude cyclohexasilane is set to 25 to 100° C. The cyclohexasilane of the present invention contains pure cyclohexasilane at a rate of 98% by mass or more and 100% by mass or less.
    Type: Grant
    Filed: December 23, 2013
    Date of Patent: April 11, 2017
    Assignee: NIPPON SHOKUBAI CO., LTD.
    Inventors: Shin-ya Imoto, Takashi Abe, Morihiro Kitamura, Hikaru Takahashi, Takehiko Morita, Tatsuhiko Akiyama
  • Publication number: 20140219893
    Abstract: High purity cyclohexasilane and a method for increasing the purification efficiency thereto are provided. The method for producing cyclohexasilane of the present invention is characterized in that, in distilling crude cyclohexasilane to obtain purified cyclohexasilane, the absolute pressure during distillation is set to 2 kPa or less, and the heating temperature of crude cyclohexasilane is set to 25 to 100° C. The cyclohexasilane of the present invention contains pure cyclohexasilane at a rate of 98% by mass or more and 100% by mass or less.
    Type: Application
    Filed: December 23, 2013
    Publication date: August 7, 2014
    Applicant: Nippon Shokubai Co., Ltd.
    Inventors: Shin-ya IMOTO, Takashi ABE, Morihiro KITAMURA, Hikaru TAKAHASHI, Takehiko MORITA, Tatsuhiko AKIYAMA
  • Patent number: 8652880
    Abstract: To provide a technique that can improve the data retention characteristic of an MRAM device by improving the resistance against an external magnetic field in a semiconductor device including the MRAM device. A first magnetic shield material is disposed over a die pad via a first die attach film. Then, a semiconductor chip is mounted over the first magnetic shield material via a second die attach film. Furthermore, a second magnetic shield material is disposed over the semiconductor chip via a third die attach film. That is, the semiconductor chip is disposed so as to be sandwiched by the first magnetic shield material and the second magnetic shield material. At this time, while the planar area of the second magnetic shield material is smaller than that of the first magnetic shield material, the thickness of the second magnetic shield material is thicker than that of the first magnetic shield material.
    Type: Grant
    Filed: August 10, 2012
    Date of Patent: February 18, 2014
    Assignee: Renesas Electronics Corporation
    Inventors: Koji Bando, Kazuyuki Misumi, Tatsuhiko Akiyama, Naoki Izumi, Akira Yamazaki
  • Patent number: 8524510
    Abstract: A method for manufacturing a magnetic memory chip device comprises the steps of: writing information in each of a plurality of magnetic memory chips formed on a silicon wafer; adhering a high magnetic permeability plate on a back face of the silicon wafer after writing information, the high magnetic permeability plate having a higher magnetic permeability than silicon and having a thickness of 50 um or more; dicing the silicon wafer into respective magnetic memory chips after adhering the high magnetic permeability plate.
    Type: Grant
    Filed: January 18, 2012
    Date of Patent: September 3, 2013
    Assignee: Renesas Electronics Corporation
    Inventors: Kazuyuki Misumi, Masahiro Shimizu, Tsuyoshi Koga, Tatsuhiko Akiyama, Tomohiro Murakami
  • Publication number: 20120309131
    Abstract: To provide a technique that can improve the data retention characteristic of an MRAM device by improving the resistance against an external magnetic field in a semiconductor device including the MRAM device. A first magnetic shield material is disposed over a die pad via a first die attach film. Then, a semiconductor chip is mounted over the first magnetic shield material via a second die attach film. Furthermore, a second magnetic shield material is disposed over the semiconductor chip via a third die attach film. That is, the semiconductor chip is disposed so as to be sandwiched by the first magnetic shield material and the second magnetic shield material. At this time, while the planar area of the second magnetic shield material is smaller than that of the first magnetic shield material, the thickness of the second magnetic shield material is thicker than that of the first magnetic shield material.
    Type: Application
    Filed: August 10, 2012
    Publication date: December 6, 2012
    Inventors: KOJI BANDO, KAZUYUKI MISUMI, TATSUHIKO AKIYAMA, NAOKI IZUMI, AKIRA YAMAZAKI
  • Patent number: 8258604
    Abstract: To provide a technique that can improve the data retention characteristic of an MRAM device by improving the resistance against an external magnetic field in a semiconductor device including the MRAM device. A first magnetic shield material is disposed over a die pad via a first die attach film. Then, a semiconductor chip is mounted over the first magnetic shield material via a second die attach film. Furthermore, a second magnetic shield material is disposed over the semiconductor chip via a third die attach film. That is, the semiconductor chip is disposed so as to be sandwiched by the first magnetic shield material and the second magnetic shield material. At this time, while the planar area of the second magnetic shield material is smaller than that of the first magnetic shield material, the thickness of the second magnetic shield material is thicker than that of the first magnetic shield material.
    Type: Grant
    Filed: December 26, 2009
    Date of Patent: September 4, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Koji Bando, Kazuyuki Misumi, Tatsuhiko Akiyama, Naoki Izumi, Akira Yamazaki
  • Publication number: 20120122246
    Abstract: A method for manufacturing a magnetic memory chip device comprises the steps of: writing information in each of a plurality of magnetic memory chips formed on a silicon wafer; adhering a high magnetic permeability plate on a back face of the silicon wafer after writing information, the high magnetic permeability plate having a higher magnetic permeability than silicon and having a thickness of 50 um or more; dicing the silicon wafer into respective magnetic memory chips after adhering the high magnetic permeability plate.
    Type: Application
    Filed: January 18, 2012
    Publication date: May 17, 2012
    Applicant: Renesas Electronics Corporation
    Inventors: Kazuyuki MISUMI, Masahiro Shimizu, Tsuyoshi Koga, Tatsuhiko Akiyama, Tomohiro Murakami
  • Patent number: 8124425
    Abstract: A method for manufacturing a magnetic memory chip device comprises the steps of: writing information in each of a plurality of magnetic memory chips formed on a silicon wafer; adhering a high magnetic permeability plate on a back face of the silicon wafer after writing information, the high magnetic permeability plate having a higher magnetic permeability than silicon and having a thickness of 50 ?m or more; dicing the silicon wafer into respective magnetic memory chips after adhering the high magnetic permeability plate.
    Type: Grant
    Filed: February 21, 2008
    Date of Patent: February 28, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Kazuyuki Misumi, Masahiro Shimizu, Tsuyoshi Koga, Tatsuhiko Akiyama, Tomohiro Murakami
  • Publication number: 20100164077
    Abstract: To provide a technique that can improve the data retention characteristic of an MRAM device by improving the resistance against an external magnetic field in a semiconductor device including the MRAM device. A first magnetic shield material is disposed over a die pad via a first die attach film. Then, a semiconductor chip is mounted over the first magnetic shield material via a second die attach film. Furthermore, a second magnetic shield material is disposed over the semiconductor chip via a third die attach film. That is, the semiconductor chip is disposed so as to be sandwiched by the first magnetic shield material and the second magnetic shield material. At this time, while the planar area of the second magnetic shield material is smaller than that of the first magnetic shield material, the thickness of the second magnetic shield material is thicker than that of the first magnetic shield material.
    Type: Application
    Filed: December 26, 2009
    Publication date: July 1, 2010
    Inventors: Koji Bando, Kazuyuki Misumi, Tatsuhiko Akiyama, Naoki Izumi, Akira Yamazaki
  • Patent number: 6583511
    Abstract: A laminated semiconductor chip assembly fabricated by fixing back surfaces of first and second semiconductor chips, respectively having principal surfaces and back surfaces, to each other. Each of the principal surfaces of the laminated semiconductor chip assembly is fixed to a corresponding surface of a lead frame. A standing linear portion of a metallic wire on a ball bond side is pulled parallel to a side surface of the semiconductor chip in its thickness direction and a side surface of the inner lead in its thickness direction, and subjected to wire bonding. The formed semiconductor chip assembly is covered by a sealing resin so that an outer lead protrudes from the sealing resin. Thus, the semiconductor device can be made thin, cost can be reduced, and quality can be improved to increase capacities of electronic equipment.
    Type: Grant
    Filed: July 13, 2001
    Date of Patent: June 24, 2003
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kazunari Michii, Tatsuhiko Akiyama
  • Patent number: 6545366
    Abstract: In order to reduce the thickness of a semiconductor device and double its capacity, two center pad semiconductor chips stacked one on the other, back to back, are fixed to one face of a wiring substrate. The difference in the length of routing between external lands and fingers is minimized, and each of the center pads and corresponding fingers are connected via metal wires having a high conductivity. The main face of a first center pad semiconductor chip is fixed to the wiring substrate that has first and second wired faces and a through opening. The back face of the first semiconductor chip and the back face of a second semiconductor chip are fixed to each other using a bonding material. The pads on each semiconductor chip are connected to corresponding fingers on the wiring substrate via metal wires. One face of the wiring substrate is sealed with a sealing resin, and on the other face, an area in the vicinity of the through opening is sealed.
    Type: Grant
    Filed: June 25, 2001
    Date of Patent: April 8, 2003
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kazunari Michii, Tatsuhiko Akiyama
  • Publication number: 20020173076
    Abstract: A laminated semiconductor chip fabricated by fixing back surfaces of first and second semiconductor chips, respectively having a principle surface and the back surface, to each other. Each of the principle surfaces of the laminated semiconductor chip is fixed to a corresponding surface of a lead frame. A standing linear portion of a metallic wire on a ball bond side is pulled up in parallel with a side surface of the semiconductor chip in its thickness direction and a side surface of the inner lead in its thickness direction, and subjected to wire bonding. Thus formed semiconductor chip is covered by a sealing resin material so that an outer lead protrudes from a side surface of the sealing resin. Thus, the thickness of the semiconductor device can be made thin, a cost can be reduced, and a quality can be improved to deal with a tendency of increments of capacities of electronic equipments.
    Type: Application
    Filed: July 13, 2001
    Publication date: November 21, 2002
    Applicant: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kazunari Michii, Tatsuhiko Akiyama
  • Publication number: 20020089050
    Abstract: In order to reduce the thickness of a semiconductor device and double its capacity, two center pad semiconductor chips stacked one on the other back to back are fixed to one face of a wiring substrate, wherein difference in the length of routing between external lands and fingers is minimized, and each of the center pads and corresponding fingers are connected via metal wires of a high conductivity.
    Type: Application
    Filed: June 25, 2001
    Publication date: July 11, 2002
    Inventors: Kazunari Michii, Tatsuhiko Akiyama
  • Patent number: 6255719
    Abstract: A boron nitride inclusion sheet is applied on the surface of a mold package enclosing a semiconductor chip so as to prevent soft error caused by a thermal neutron.
    Type: Grant
    Filed: December 1, 1998
    Date of Patent: July 3, 2001
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hirotada Kuriyama, Kazuhito Tsutsumi, Yutaka Arita, Tatsuhiko Akiyama, Tadafumi Kishimoto