Patents by Inventor Tatsuhiko Miura

Tatsuhiko Miura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10487393
    Abstract: In one embodiment, a semiconductor manufacturing apparatus includes a carrier having first and second ends extending in a first direction, and third and fourth ends extending in a second direction and being not shorter than the first and second ends. The apparatus further includes a member holder having a magnet placement face on which first and second magnetic-pole portions are placed, the magnet placement face having fifth and sixth ends extending in the first direction and being shorter than the first and second ends, and seventh and eighth ends extending in the second direction, being longer than the fifth and sixth ends, and being longer than the third and fourth ends. The apparatus further includes a carrier transporter transporting the carrier along the first direction. The carrier transporter can transport the carrier such that the third and fourth ends pass under a center line of the magnet placement face.
    Type: Grant
    Filed: September 8, 2017
    Date of Patent: November 26, 2019
    Assignee: Toshiba Memory Corporation
    Inventors: Tatsuhiko Miura, Kazuhiro Murakami
  • Publication number: 20190259587
    Abstract: A deposition preventive plate according to an embodiment is a deposition preventive plate arranged on an outer periphery of a cathode electrode capable of holding a target material inside a sputtering apparatus, and the deposition preventive plate includes a base material and sprayed deposit arranged over the base material and containing Si.
    Type: Application
    Filed: July 5, 2018
    Publication date: August 22, 2019
    Applicant: Toshiba Memory Corporation
    Inventor: Tatsuhiko MIURA
  • Publication number: 20170369988
    Abstract: In one embodiment, a semiconductor manufacturing apparatus includes a carrier having first and second ends extending in a first direction, and third and fourth ends extending in a second direction and being not shorter than the first and second ends. The apparatus further includes a member holder having a magnet placement face on which first and second magnetic-pole portions are placed, the magnet placement face having fifth and sixth ends extending in the first direction and being shorter than the first and second ends, and seventh and eighth ends extending in the second direction, being longer than the fifth and sixth ends, and being longer than the third and fourth ends. The apparatus further includes a carrier transporter transporting the carrier along the first direction. The carrier transporter can transport the carrier such that the third and fourth ends pass under a center line of the magnet placement face.
    Type: Application
    Filed: September 8, 2017
    Publication date: December 28, 2017
    Applicant: Toshiba Memory Corporation
    Inventors: Tatsuhiko MIURA, Kazuhiro MURAKAMI
  • Patent number: 9758863
    Abstract: In one embodiment, a semiconductor manufacturing apparatus includes a carrier having first and second ends extending in a first direction, and third and fourth ends extending in a second direction and being not shorter than the first and second ends. The apparatus further includes a member holder having a magnet placement face on which first and second magnetic-pole portions are placed, the magnet placement face having fifth and sixth ends extending in the first direction and being shorter than the first and second ends, and seventh and eighth ends extending in the second direction, being longer than the fifth and sixth ends, and being longer than the third and fourth ends. The apparatus further includes a carrier transporter transporting the carrier along the first direction. The carrier transporter can transport the carrier such that the third and fourth ends pass under a center line of the magnet placement face.
    Type: Grant
    Filed: July 15, 2015
    Date of Patent: September 12, 2017
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Tatsuhiko Miura, Kazuhiro Murakami
  • Publication number: 20160265101
    Abstract: In one embodiment, a semiconductor manufacturing apparatus includes a carrier having first and second ends extending in a first direction, and third and fourth ends extending in a second direction and being not shorter than the first and second ends. The apparatus further includes a member holder having a magnet placement face on which first and second magnetic-pole portions are placed, the magnet placement face having fifth and sixth ends extending in the first direction and being shorter than the first and second ends, and seventh and eighth ends extending in the second direction, being longer than the fifth and sixth ends, and being longer than the third and fourth ends. The apparatus further includes a carrier transporter transporting the carrier along the first direction. The carrier transporter can transport the carrier such that the third and fourth ends pass under a center line of the magnet placement face.
    Type: Application
    Filed: July 15, 2015
    Publication date: September 15, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Tatsuhiko MIURA, Kazuhiro Murakami
  • Publication number: 20160020107
    Abstract: In MOSFET having SBD as a protection element, a TiW (alloy having tungsten as a main component) film is used as an aluminum-diffusion barrier metal film below an aluminum source electrode in order to secure properties of SBD. The present inventors have found that a tungsten-based barrier metal film is in the form of columnar grains having a lower barrier property than that of a titanium-based barrier metal film such as TiN so that aluminum spikes are generated relatively easily in a silicon substrate. In the present invention, when a tungsten-based barrier metal film is formed by sputtering as a barrier metal layer between an aluminum-based metal layer and a silicon-based semiconductor layer therebelow, the lower layer is formed by ionization sputtering while applying a bias to the wafer side and the upper layer is formed by sputtering without applying a bias to the wafer side.
    Type: Application
    Filed: September 28, 2015
    Publication date: January 21, 2016
    Inventor: Tatsuhiko MIURA
  • Patent number: 9177813
    Abstract: In MOSFET having SBD as a protection element, a TiW (alloy having tungsten as a main component) film is used as an aluminum-diffusion barrier metal film below an aluminum source electrode in order to secure properties of SBD. The present inventors have found that a tungsten-based barrier metal film is in the form of columnar grains having a lower barrier property than that of a titanium-based barrier metal film such as TiN so that aluminum spikes are generated relatively easily in a silicon substrate. In the present invention, when a tungsten-based barrier metal film is formed by sputtering as a barrier metal layer between an aluminum-based metal layer and a silicon-based semiconductor layer therebelow, the lower layer is formed by ionization sputtering while applying a bias to the wafer side and the upper layer is formed by sputtering without applying a bias to the wafer side.
    Type: Grant
    Filed: March 19, 2010
    Date of Patent: November 3, 2015
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Tatsuhiko Miura
  • Patent number: 8513094
    Abstract: In the manufacturing steps of a power-type semiconductor device, after grinding the back surface of the semiconductor wafer, when a metal film is deposited by sputtering deposition over the back surface of the wafer in a preheated state, the wafer is contained in an annular susceptor, and processed. A radial vertical cross section of the annular shape of the susceptor has a first upper surface closer to a horizontal surface for holding a peripheral portion of the top surface of the semiconductor wafer against gravity, and a second upper surface continued to and located outside the first upper surface and closer to a vertical surface for holding a side surface of the semiconductor wafer against lateral displacement.
    Type: Grant
    Filed: May 14, 2012
    Date of Patent: August 20, 2013
    Assignee: Renesas Electronics Corporation
    Inventor: Tatsuhiko Miura
  • Publication number: 20120309191
    Abstract: In the manufacturing steps of a power-type semiconductor device, after grinding the back surface of the semiconductor wafer, when a metal film is deposited by sputtering deposition over the back surface of the wafer in a preheated state, the wafer is contained in an annular susceptor, and processed. A radial vertical cross section of the annular shape of the susceptor has a first upper surface closer to a horizontal surface for holding a peripheral portion of the top surface of the semiconductor wafer against gravity, and a second upper surface continued to and located outside the first upper surface and closer to a vertical surface for holding a side surface of the semiconductor wafer against lateral displacement.
    Type: Application
    Filed: May 14, 2012
    Publication date: December 6, 2012
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventor: Tatsuhiko MIURA
  • Patent number: 8278210
    Abstract: In a modern 0.15 ?m power MOSFET, aluminum voids (voids formed in an aluminum-type electrode) are generated frequently in trench portions (source contact trenches) caused by the reduction of a cell pitch for refinement. It is considered to be attributable to the defects which are generated mainly due to a sudden increase of the aspect ratio from 0.84 in the previous generation to 2.8 in the current generation. Accordingly, concave portions of repetitive trenches having a high aspect ratio are filled with an aluminum-type metal by ionized sputtering throughout the processing, from the formation to the filling of an aluminum-type metal seed film.
    Type: Grant
    Filed: March 5, 2010
    Date of Patent: October 2, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Tatsuhiko Miura
  • Patent number: 8198162
    Abstract: Provided is a manufacturing method of a semiconductor device wherein the generation of voids is prevented in aluminum-based electrodes or the like. The method is suitable for manufacturing a semiconductor device adapted for vehicles, which is required to have a high reliability. However, it is very difficult that power semiconductor devices such as power MOSFETs, in particular, trench gate type power MOS devices are formed without having any void since the thickness of aluminum-based electrodes thereof is as large as about 3500 to 5500 nm (2.5 ?m or more). In the present invention, a method is provided wherein at the time of forming an aluminum-based electrode metal film positioned over a wafer and having a thickness of 2.5 ?m or more over a highland/lowland-repeated region in a line and space form by sputtering, the temperature of the wafer is set to 400° C. or higher and lower than 500° C.
    Type: Grant
    Filed: January 9, 2009
    Date of Patent: June 12, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Kazuya Sekiguchi, Yoshio Fukayama, Yuji Takahashi, Tomokuni Chino, Tsuyoshi Kachi, Katsuhiro Mitsui, Daisuke Ono, Tatsuhiko Miura
  • Patent number: 8008193
    Abstract: Provided is a manufacturing method for improving the reliability of a semiconductor device having a back electrode. After formation of semiconductor elements on the surface of a silicon substrate, the backside surface thereof, which is opposite to the element formation surface, is subjected to the following steps in a processing apparatus. After deposition of a first metal film over the backside surface of the silicon substrate in a first chamber, it is heat treated to form a metal silicide film. Then, a nickel film is deposited in a third chamber, followed by deposition of an antioxidant conductor film in a second chamber. Heat treatment for alloying the first metal film and the silicon substrate is performed at least prior to the deposition of the nickel film. The first chamber has therefore a mechanism for depositing the first metal film and a lamp heating mechanism.
    Type: Grant
    Filed: May 6, 2009
    Date of Patent: August 30, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Yoshihiro Kainuma, Tatsuhiko Miura, Takashi Sato, Katsuhiro Mitsui, Daisuke Ono
  • Publication number: 20100291767
    Abstract: In MOSFET having SBD as a protection element, a TiW (alloy having tungsten as a main component) film is used as an aluminum-diffusion barrier metal film below an aluminum source electrode in order to secure properties of SBD. The present inventors have found that a tungsten-based barrier metal film is in the form of columnar grains having a lower barrier property than that of a titanium-based barrier metal film such as TiN so that aluminum spikes are generated relatively easily in a silicon substrate. In the present invention, when a tungsten-based barrier metal film is formed by sputtering as a barrier metal layer between an aluminum-based metal layer and a silicon-based semiconductor layer therebelow, the lower layer is formed by ionization sputtering while applying a bias to the wafer side and the upper layer is formed by sputtering without applying a bias to the wafer side.
    Type: Application
    Filed: March 19, 2010
    Publication date: November 18, 2010
    Applicant: RENESAS TECHNOLOGY CORP.
    Inventor: Tatsuhiko MIURA
  • Publication number: 20100255677
    Abstract: It has been found by the present inventors, et. al. that, in a modern 0.15 ?m power MOSFET, aluminum voids (voids formed in aluminum type electrode) are generated frequently in trench portions (source contact trenches) caused by the reduction of a cell pitch for refinement. It is considered to be attributable to that the defects are generated mainly due to sudden increase of the aspect ratio from 0.84 in the previous generation to 2.8 in the current generation. That is, according to an invention of the present application, concave portions of repetitive trenches having a high aspect ratio are filled with an aluminum type metal by ionized sputtering through out the processing from the formation to the filling of an aluminum type metal seed film.
    Type: Application
    Filed: March 5, 2010
    Publication date: October 7, 2010
    Applicant: RENESAS TECHNOLOGY CORP.
    Inventor: Tatsuhiko MIURA
  • Publication number: 20100009532
    Abstract: Provided is a manufacturing method for improving the reliability of a semiconductor device having a back electrode. After formation of semiconductor elements on the surface of a silicon substrate, the backside surface thereof, which is opposite to the element formation surface, is subjected to the following steps in a processing apparatus. After deposition of a first metal film over the backside surface of the silicon substrate in a first chamber, it is heat treated to form a metal silicide film. Then, a nickel film is deposited in a third chamber, followed by deposition of an antioxidant conductor film in a second chamber. Heat treatment for alloying the first metal film and the silicon substrate is performed at least prior to the deposition of the nickel film. The first chamber has therefore a mechanism for depositing the first metal film and a lamp heating mechanism.
    Type: Application
    Filed: May 6, 2009
    Publication date: January 14, 2010
    Applicant: RENESAS TECHNOLOGY CORP.
    Inventors: Yoshihiro KAINUMA, Tatsuhiko MIURA, Takashi SATO, Katsuhiro MITSUI, Daisuke ONO
  • Publication number: 20090179261
    Abstract: Provided is a manufacturing method of a semiconductor device wherein the generation of voids is prevented in aluminum-based electrodes or the like. The method is suitable for manufacturing a semiconductor device adapted for vehicles, which is required to have a high reliability. However, it is very difficult that power semiconductor devices such as power MOSFETs, in particular, trench gate type power MOS devices are formed without having any void since the thickness of aluminum-based electrodes thereof is as large as about 3500 to 5500 nm (2.5 ?m or more). In the present invention, a method is provided wherein at the time of forming an aluminum-based electrode metal film positioned over a wafer and having a thickness of 2.5 ?m or more over a highland/lowland-repeated region in a line and space form by sputtering, the temperature of the wafer is set to 400° C. or higher and lower than 500° C.
    Type: Application
    Filed: January 9, 2009
    Publication date: July 16, 2009
    Inventors: Kazuya SEKIGUCHI, Yoshio Fukayama, Yuji Takahashi, Tomokuni Chino, Tsuyoshi Kachi, Katsuhiro Mitsui, Daisuke Ono, Tatsuhiko Miura
  • Patent number: 4798393
    Abstract: A rider-controlled working machine having a four-wheel steering system including a steering link mechanism operatively interconnecting a steering wheel and front and rear wheels for steering the front and rear wheels simultaneously. The steering link mechanism includes a device for steering the rear wheels such that when the steering wheel is turned through a relatively large angle, the center of turning movement of the working machine is positioned between extensions of the axles of the front and rear wheels at the time the front and rear wheels are in a neutral steering position, and when the steering wheel is turned through a relatively small angle, the center of turning movement of the working machine is positioned between an extension of the transverse axis of an earth working unit coupled to the rear end of the working machine and the extensions of the axles of the rear wheels.
    Type: Grant
    Filed: June 12, 1987
    Date of Patent: January 17, 1989
    Assignee: Honda Giken Kogyo Kabushiki Kaisha
    Inventors: Tatsuhiko Miura, Hiroshi Uno
  • Patent number: 4613009
    Abstract: A wheel supporting structure (200, 300, 400) for riding type working vehicles (1) comprises a knuckle holder (80, 90) fixed to a body (2) of the vehicle and formed with a plurality of fixing holes, (83, 84, 85, 93, 94, 95) vertically spaced apart from each other, a knuckle (55, 73) for supporting a ground wheel (7, 8) of the vehicle, and an arm member (59, 77) vertically swingably pivoted at one end thereof on a portion of the vehicle body (2, 40) including the knuckle holder (80, 90) and pivotally connected at the other end thereof to the knuckle (55, 73), and the knuckle (55, 73) is selectively fixed by bolting (99, 309) to one of the fixing holes (83, 84, 85, 93, 94, 95).
    Type: Grant
    Filed: August 21, 1985
    Date of Patent: September 23, 1986
    Assignee: Honda Giken Kogyo Kabushiki Kaisha
    Inventors: Kenji Nakamura, Tatsuhiko Miura
  • Patent number: 4258820
    Abstract: A sub-frame supporting device in which a sub-frame adapted to support an engine, wheels and the like is supported from the body of a vehicle through an elastic support member. The supporting device comprises a pair of upper and lower holding plates oppositely disposed, a spacer pipe connecting the holding plates, a fastener for fastening the holding plates to a vehicle body and an elastic support member. A flange of the sub-frame is held between the elastic support member and a damper rib, and gaps are formed adjacent the upper and lower surfaces of the elastic support member. The rigidity of the elastic support member is set so as to be decreased with respect to vertical shearing force and increased with respect to lateral compressive force.
    Type: Grant
    Filed: August 27, 1979
    Date of Patent: March 31, 1981
    Assignee: Honda Giken Kogyo Kabushiki Kaisha
    Inventors: Tatsuhiko Miura, Takefumi Toyoshima, Kazuo Kikuchi, Akio Masaki
  • Patent number: 4151822
    Abstract: The apparatus is employed to fixedly position an internal combustion engine upon a frame. The engine is normally provided with a pair of oppositely positioned arms which are affixed to the engine and project outwardly for connection to a frame. A supporting structure intermediate the engine and the frame is connected to the arms extending from the engine at a first point and to the frame at a second point. This supporting structure comprises a first and second spaced apart generally U-shaped members which have sloping parallel sides provided with a resilient mass therebetween. The first member is provided with a cover plate which is affixed thereto, and thereby forms a hollow chamber with the first member. Within this hollow chamber is disposed another resilient mass that in turn is enclosed by an abutment positioned thereabove. The second member is likewise provided with still another resilient mass which is positioned on a surface beneath the first member.
    Type: Grant
    Filed: May 3, 1977
    Date of Patent: May 1, 1979
    Assignee: Honda Giken Kogyo Kabushiki Kaisha
    Inventors: Tatsuhiko Miura, Hiroyuki Ito