Abstract: A display device includes a processor including a first display mode in which the processor displays the image on the display screen from an internal image data after the processor receives a first control signal, and a second display mode in which the processor displays the image on the display screen from the image data received by the processor after the processor receives a second control signal. A luminance adjuster adjusts a display luminance based on the internal image data corresponding to a final frame immediately before switching from the first display mode to the second display mode to a display luminance higher than a display luminance of the internal image data of another frame in the first display mode. In the final frame, the image is displayed based on the internal image data in which the display luminance is adjusted by the luminance adjuster.

Abstract: A display device including a processor that includes a first display mode in which the processor displays the image on the display screen; and a second display mode in which the processor displays the image on the display screen from the image data received by the processor. The display device further includes a calculator that calculates a blanking period between a writing end time point of the internal image data corresponding to a final frame immediately before switching from the first display mode to the second display mode and a writing start time point of the image data corresponding to an initial frame immediately after switching from the first display mode to the second display mode, and an adjuster that adjusts at least one of a vertical retrace period, a horizontal retrace period, and a clock frequency, which correspond to the internal image data, depending on the blanking period.

Abstract: A display device includes a processor including a first display mode in which the processor displays the image on the display screen from an internal image data after the processor receives a first control signal, and a second display mode in which the processor displays the image on the display screen from the image data received by the processor after the processor receives a second control signal. A luminance adjuster adjusts a display luminance based on the internal image data corresponding to a final frame immediately before switching from the first display mode to the second display mode to a display luminance lower than a display luminance of the internal image data of another frame in the first display mode. In the final frame, the image is displayed based on the internal image data in which the display luminance is adjusted by the luminance adjuster.

Abstract: A display device includes a processor including a first display mode in which the processor displays the image on the display screen from an internal image data after the processor receives a first control signal, and a second display mode in which the processor displays the image on the display screen from the image data received by the processor after the processor receives a second control signal. A luminance adjuster adjusts a display luminance based on the internal image data corresponding to a final frame immediately before switching from the first display mode to the second display mode to a display luminance higher than a display luminance of the internal image data of another frame in the first display mode. In the final frame, the image is displayed based on the internal image data in which the display luminance is adjusted by the luminance adjuster.

Abstract: A display device includes a processor including a first display mode in which the processor displays the image on the display screen from an internal image data after the processor receives a first control signal, and a second display mode in which the processor displays the image on the display screen from the image data received by the processor after the processor receives a second control signal. A luminance adjuster adjusts a display luminance based on the internal image data corresponding to a final frame immediately before switching from the first display mode to the second display mode to a display luminance lower than a display luminance of the internal image data of another frame in the first display mode. In the final frame, the image is displayed based on the internal image data in which the display luminance is adjusted by the luminance adjuster.

Abstract: A display device including a processor that includes a first display mode in which the processor displays the image on the display screen; and a second display mode in which the processor displays the image on the display screen from the image data received by the processor. The display device further includes a calculator that calculates a blanking period between a writing end time point of the internal image data corresponding to a final frame immediately before switching from the first display mode to the second display mode and a writing start time point of the image data corresponding to an initial frame immediately after switching from the first display mode to the second display mode, and an adjuster that adjusts at least one of a vertical retrace period, a horizontal retrace period, and a clock frequency, which correspond to the internal image data, depending on the blanking period.

Abstract: The present invention includes: a liquid crystal panel 105 on which is formed a matrix of a plurality of image elements; a correction circuit 107 that receives a video data gradation signal input, generates a correction signal for correcting luminance using a relationship defined by the gradation level from an input gradation for an (N?1)-th frame and the gradation level from an input gradation for an N-th frame, and corrects the input gradation signal for the N-th frame using the correction signal; a data driver 109 generating a write potential based on the corrected input gradation signal for the N-th frame and applies the potential to an image element; and a scan driver selecting an image element to which the write potential is applied.

Abstract: A liquid crystal display device in which the time necessary for luminance to change from application of a different gray-scale voltage exceeds one frame period in relation to the response as a luminance change time of the liquid crystal. The liquid crystal display device includes a signal control circuit for preventing the content of a preceding frame from being displayed as an after-image and preventing also deterioration of image quality. The signal control circuit includes a frame memory for delaying by one frame the first display data inputted from the external device, an arithmetic operation circuit for comparing the second display data stored in the frame memory and delayed by one frame with the first display data, and an addition/subtraction circuit for adding and subtracting correction data outputted by the arithmetic operation circuit to and from the first display data.

Abstract: A liquid crystal display device in which the time necessary for luminance to change from application of a different gray-scale voltage exceeds one frame period in relation to the response as a luminance change time of the liquid crystal. The liquid crystal display device includes a signal control circuit for preventing the content of a preceding frame from being displayed as an after-image and preventing also deterioration of image quality. The signal control circuit includes a frame memory for delaying by one frame the first display data inputted from the external device, an arithmetic operation circuit for comparing the second display data stored in the frame memory and delayed by one frame with the first display data, and an addition/subtraction circuit for adding and subtracting correction data outputted by the arithmetic operation circuit to and from the first display data.

Abstract: A display apparatus includes a display having a plurality of pixels, and a controller which selects a pattern corresponding to a gradation of gradation data. On-state pixels are added to a pattern corresponding to one gradation of the gradation data to obtain a pattern corresponding to another gradation of the gradation data higher than the one gradation of the gradation data while maintaining unchanged an arrangement of on-state pixels in the pattern corresponding to the one gradation of the gradation data.

Abstract: A liquid crystal display device in which the time necessary for luminance to change from application of a different gray-scale voltage exceeds one frame period in relation to the response as a luminance change time of the liquid crystal. The liquid crystal display device includes a signal control circuit for preventing the content of a preceding frame from being displayed as an after-image and preventing also deterioration of image quality. The signal control circuit includes a frame memory for delaying by one frame the first display data inputted from the external device, an arithmetic operation circuit for comparing the second display data stored in the frame memory and delayed by one frame with the first display data, and an addition/subtraction circuit for adding and subtracting correction data outputted by the arithmetic operation circuit to and from the first display data.

Abstract: An information processing system includes a bus, a display data generating circuit coupled to the bus, and a display apparatus coupled to the bus. The display apparatus includes a display panel capable of displaying a grayscale image in accordance with display data in a form of a plurality of bits for each of a plurality of pixels of a display panel generated by the display data generating circuit, and a signal driver which supplies driving voltages corresponding to the display data to at least a part of the plurality of data lines to display a grayscale image on the display panel. The signal driver includes a display memory which stores the display data, and is embodied in an integrated circuit. The display data generating circuit transfers the display data to the display memory via the bus.

Abstract: A liquid crystal display device in which the time necessary for luminance to change from application of a different gray-scale voltage exceeds one frame period in relation to the response as a luminance change time of the liquid crystal. The liquid crystal display device includes a signal control circuit for preventing the content of a preceding frame from being displayed as an after-image and preventing also deterioration of image quality. The signal control circuit includes a frame memory for delaying by one frame the first display data inputted from the external device, an arithmetic operation circuit for comparing the second display data stored in the frame memory and delayed by one frame with the first display data, and an addition/subtraction circuit for adding and subtracting correction data outputted by the arithmetic operation circuit to and from the first display data.

Abstract: A liquid crystal display device in which the time necessary for luminance to change from application of a different gray-scale voltage exceeds one frame period in relation to the response as a luminance change time of the liquid crystal. The liquid crystal display device includes a signal control circuit for preventing the content of a preceding frame from being displayed as an after-image and preventing also deterioration of image quality. The signal control circuit includes a frame memory for delaying by one frame the first display data inputted from the external device, an arithmetic operation circuit for comparing the second display data stored in the frame memory and delayed by one frame with the first display data, and an addition/subtraction circuit for adding and subtracting correction data outputted by the arithmetic operation circuit to and from the first display data.

Abstract: A display apparatus includes a display having a plurality of pixels, and a controller which selects a pattern corresponding to a gradation of gradation data. On-state pixels are added to a pattern corresponding to one gradation of the gradation data to obtain a pattern corresponding to another gradation of the gradation data higher than the one gradation of the gradation data while maintaining unchanged an arrangement of on-state pixels in the pattern corresponding to the one gradation of the gradation data.

Abstract: A liquid crystal display includes a scanning voltage driver which applies selective scanning voltages to scanning electrodes of a liquid crystal display panel one group of M (an integer of 2 or greater) adjacent scanning electrodes at a time in accordance with M orthogonal function data. A data voltage driver applies to data electrodes of the liquid crystal display panel data voltages selected from M+1 data voltages in accordance with a coincidence number representing a number of coincidences between values of M display data corresponding to the M adjacent scanning electrodes in a current group of scanning electrodes and values of the M orthogonal function data corresponding to the M adjacent scanning electrodes in the current group.

Abstract: A liquid crystal display control apparatus includes a display on/off data generation circuit for generating plural display on/off data per pixel corresponding to M (M>N, M and N being integers) frame periods of a video output signal in N frame periods of a video input signal on a unit pixel basis in response to gray-scale data of pixel units included in the video input signal, a write control circuit for writing display on/off data per pixel corresponding to M frames of the video output signal generated by the display on/off data generation circuit into a frame memory during N frame periods of the video input signal, and a read control circuit for sequentially reading out, from the frame memory, display on/off data corresponding to M frames of the video output signal written in the frame memory in synchronism with one display scan period of the video output signal, thereby the data written in the frame memory is not gray-scale data but display on/off data of one bit, therefore, a data bus width at a time o

Abstract: The present invention includes: a liquid crystal panel 105 on which is formed a matrix of a plurality of image elements; a correction circuit 107 that receives a video data gradation signal input, generates a correction signal for correcting luminance using a relationship defined by the gradation level from an input gradation for an (N−1)-th frame and the gradation level from an input gradation for an N-th frame, and corrects the input gradation signal for the N-th frame using the correction signal; a data driver 109 generating a write potential based on the corrected input gradation signal for the N-th frame and applies the potential to an image element; and a scan driver selecting an image element to which the write potential is applied.

Abstract: A liquid crystal display control apparatus includes a display on/off data generation circuit for generating display on/off data corresponding to M (M>N, M and N being integers) frame periods of a video output signal in N frame periods of a video input signal on a unit pixel basis in response to gray-scale data of pixel units included in the video input signal, a write control circuit for writing display on/off data corresponding to M frames of the video output signal generated by the display on/off data generation circuit into a frame memory during N frame periods of the video input signal, and a read control circuit for sequentially reading out, from the frame memory, display on/off data corresponding to M frames of the video output signal written in the frame memory in synchronism with one display scan period of the video output signal, thereby the data written in the frame memory is not gray-scale data but display on/off data of one bit, therefore, a data bus width at a time of accessing the frame memor

Abstract: An information processing system includes a bus, a display data generating circuit coupled to the bus, and a display apparatus coupled to the bus. The display apparatus includes a display panel capable of displaying a grayscale image in accordance with display data in a form of a plurality of bits for each of a plurality of pixels of a display panel generated by the display data generating circuit, and a signal driver which supplies driving voltages corresponding to the display data to at least a part of the plurality of data lines to display a grayscale image on the display panel. The signal driver includes a display memory which stores the display data, and is embodied in an integrated circuit. The display data generating circuit transfers the display data to the display memory via the bus.