Patents by Inventor Tatsuhiro Watanabe

Tatsuhiro Watanabe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240142539
    Abstract: A battery monitoring includes a plurality of monitoring units and a wireless transmission unit. The plurality of monitoring units is configured to acquire battery-related information including at least information indicating a state of a battery. The wireless transmission unit is configured to wirelessly transmit the battery-related information acquired by the plurality of monitoring units to a control device.
    Type: Application
    Filed: September 22, 2023
    Publication date: May 2, 2024
    Inventors: Shogo SHIGEMORI, Tatsuhiro NUMATA, Tetsuya WATANABE
  • Publication number: 20240077539
    Abstract: In a technique for monitoring a state of a battery, battery monitoring information is acquired via wireless communication from monitoring devices that acquire the battery monitoring information from the battery. A predetermined process is executed based on the battery monitoring information. Instructions are transmitted to the monitoring devices via unicast communication and broadcast communication within a communication cycle. The instructions include an instruction transmitted via the unicast communication to each of the monitoring devices about acquisition of the battery monitoring information, and an instruction transmitted via the broadcast communication to the monitoring devices about a timing of acquisition of the battery monitoring information.
    Type: Application
    Filed: August 24, 2023
    Publication date: March 7, 2024
    Inventors: Shogo SHIGEMORI, Tatsuhiro NUMATA, Tetsuya WATANABE
  • Patent number: 11087933
    Abstract: To prevent incoincidence of contacts, a safety switch switches the contacts by cooperation of an actuator and a switch body. The switch body includes an operating cam and a locking cam that rotate due to insertion of the actuator, an operating rod that switches the contact according to rotation of the operating cam, and a locking lever that is movable toward and away from the locking cam such that the locking lever takes a lock position in which it locks rotation of the locking cam and an unlock position in which it unlocks rotation of the locking cam. The locking lever includes a bulge protruding toward the locking cam. A cam contact surface of the locking lever contacts the locking cam when the actuator moves in a drawing-out direction in an intermediate position between the lock position and the unlock position.
    Type: Grant
    Filed: December 20, 2018
    Date of Patent: August 10, 2021
    Assignee: IDEC Corporation
    Inventors: Tatsuhiro Watanabe, Masatake Yamano
  • Patent number: 10861660
    Abstract: A cam of a safety switch rotates about a rotational shaft in accordance with an operation of inserting an actuator into an opening and an operation of withdrawing the actuator. A switch part includes an operation rod that reciprocates according to a rotation angle of the cam, and detects an insertion state where the actuator is inserted in the opening. In the insertion state, a locking member locks the actuator upon engagement with a part of the cam. When the operation of withdrawing the actuator is performed in a locked state of the actuator, the cam pushes the locking member in one direction, and the locking member pushes a part of a head case in the one direction. This improves locking strength of the safety switch.
    Type: Grant
    Filed: February 16, 2018
    Date of Patent: December 8, 2020
    Inventors: Tatsuhiro Watanabe, Masatake Yamano
  • Publication number: 20200058457
    Abstract: A cam of a safety switch rotates about a rotational shaft in accordance with an operation of inserting an actuator into an opening and an operation of withdrawing the actuator. A switch part includes an operation rod that reciprocates according to a rotation angle of the cam, and detects an insertion state where the actuator is inserted in the opening. In the insertion state, a locking member locks the actuator upon engagement with a part of the cam. When the operation of withdrawing the actuator is performed in a locked state of the actuator, the cam pushes the locking member in one direction, and the locking member pushes a part of a head case in the one direction. This improves locking strength of the safety switch.
    Type: Application
    Filed: February 16, 2018
    Publication date: February 20, 2020
    Inventors: Tatsuhiro WATANABE, Masatake YAMANO
  • Publication number: 20200006016
    Abstract: A safety switch prevents incoincidence of contacts from occurring. The safety switch 1 is structured so as to switch the contact by cooperation of an actuator 3 and a switch bod 2. The switch body 2 includes an operating cam 21 and a locking cam 22 that are adapted to rotate by insertion of the actuator 3, an operating rod 26 that switches the contact according to rotation of the operating cam 21, and a locking lever 29 that is provided movably toward and away from the locking cam 22 such that the locking lever 29 takes a lock position IV in which it locks rotation of the locking cam 22 and an unlock position I in which it unlocks a lock state of the locking cam 22. The locking lever 29 includes a bulge 29f that protrudes toward the locking cam 22 at a portion of its cam contact surface. The cam contact surface is adapted to contact the locking cam 22 when the actuator 3 moves in a drawing-out direction in an intermediate position between the lock position IV and the unlock position I.
    Type: Application
    Filed: December 20, 2018
    Publication date: January 2, 2020
    Inventors: Tatsuhiro WATANABE, Masatake YAMANO
  • Patent number: 7200059
    Abstract: A burn-in test, including first to sixth steps where voltages are applied for the same lengths of time in each step, is applied to a semiconductor memory having alternately arranged bit line pairs with twist structure where the bit lines cross each other and bit line pairs with non-twist structure where the bit lines are parallel to each other. Since lengths of time in which a stress is applied for all bit lines can be equally set, no deviation occurs in lengths of time where stress is applied between the bit lines. Characteristics of memory cells can be prevented from excessively deteriorating from the burn-in test. Further, the number of bit lines not having stress applied can be minimized in the first to sixth steps. Accordingly, the ratio of the bit lines having stress applied can be increased, which reduces the burn-in test time. Thus, test cost can be reduced.
    Type: Grant
    Filed: October 28, 2005
    Date of Patent: April 3, 2007
    Assignee: Fujitsu Limited
    Inventors: Shinya Fujioka, Yoshiaki Okuyama, Yasuhiro Takada, Tatsuhiro Watanabe, Nobumi Kodama
  • Publication number: 20060291307
    Abstract: A burn-in test, including first to sixth steps where voltages are applied for the same lengths of time in each step, is applied to a semiconductor memory having alternately arranged bit line pairs with twist structure where the bit lines cross each other and bit line pairs with non-twist structure where the bit lines are parallel to each other. Since lengths of time in which a stress is applied for all bit lines can be equally set, no deviation occurs in lengths of time where stress is applied between the bit lines. Characteristics of memory cells can be prevented from excessively deteriorating from the burn-in test. Further, the number of bit lines not having stress applied can be minimized in the first to sixth steps. Accordingly, the ratio of the bit lines having stress applied can be increased, which reduces the burn-in test time. Thus, test cost can be reduced.
    Type: Application
    Filed: October 28, 2005
    Publication date: December 28, 2006
    Inventors: Shinya Fujioka, Yoshiaki Okuyama, Yasuhiro Takada, Tatsuhiro Watanabe, Nobumi Kodama
  • Patent number: 5258639
    Abstract: A semiconductor memory device includes respective regions of a column decoder and a sense amplifier drive circuit arranged to lie opposite to each other on a semiconductor chip, respective regions of a memory cell array, a column gate and a sense amplifier arranged between the regions of the column decoder and the sense amplifier drive circuit, a plurality of column selection lines led out from the region of the column decoder, connected to respective column gate portions of the region of the column gate, and collected and arranged with units of groups of a predetermined number above the region of the column gate so as to have a smaller arrangement pitch than that of the column gate portion, and at least one sense amplifier drive signal line led out from the region of the sense amplifier drive circuit, connected to respective sense amplifier portions of the region of the sense amplifier, and arranged above the region of the sense amplifier so as to lie next to each group of the column selection lines.
    Type: Grant
    Filed: November 4, 1992
    Date of Patent: November 2, 1993
    Assignee: Fujitsu Limited
    Inventor: Tatsuhiro Watanabe