Patents by Inventor Tatsuhito Iiyama

Tatsuhito Iiyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5113392
    Abstract: In a network having a plurality of node apparatus connected to a transmission line, each node apparatus segmenting a transmission message into information blocks of a predetermined length and transmitting them to the transmission line in the form of a fixed length packet (cell) having a source address, each node apparatus sequentially stores packets having different source addresses in vacant memory blocks of a buffer memory. There is written in each memory block the packet data as well as a next address pointer indicating a memory block in which the next received packet having the same source address is stored. When a packet containing the last information block of a message is received, stored in a read address queue is the address indicating the memory block which stores the first information block of the same packet.
    Type: Grant
    Filed: June 18, 1990
    Date of Patent: May 12, 1992
    Assignees: Hitachi, Ltd., Hitachi Microcomputer Engineering Ltd.
    Inventors: Yoshihiro Takiyasu, Mitsuhiro Yamaga, Kazunori Nakamura, Eiichi Amada, Hidehiko Jusa, Naoya Kobayashi, Osamu Takada, Satoru Hirayama, Tatsuhito Iiyama