Patents by Inventor Tatsuhito Saito

Tatsuhito Saito has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020095648
    Abstract: A layout method of an analog/digital mixed semiconductor integrated circuit of the present invention has the steps of: quantitatively calculating a noise circulation amount with parameters of distances between an analog element, a digital element, and a substrate contact dedicated terminal for the digital element; calculating an optimal layout position of the substrate contact dedicated terminal from a position where the noise circulation amount is smallest; and placing the contact dedicated terminal in the optimal calculated layout position and in the layoutable position.
    Type: Application
    Filed: October 24, 2001
    Publication date: July 18, 2002
    Inventor: Tatsuhito Saito
  • Patent number: 6230294
    Abstract: A transient analysis device in which a simulation executing unit uses a first net list produced by a net list producing unit to measure a settling time of an analog/digital mixed circuit to be analyzed, after a dummy pulse parameter setting unit sets a parameter of a dummy pulse based on the measurement result, the net list producing unit converts, into a net list, a transfer function of a new circuit obtained as a result of the addition of a dummy pulse generation circuit for generating a dummy pulse whose parameter has been set to the analog/digital mixed circuit, and the simulation executing unit executes transient analysis processing by using a second net list produced with respect to the new circuit.
    Type: Grant
    Filed: February 26, 1998
    Date of Patent: May 8, 2001
    Assignee: NEC Corporation
    Inventor: Tatsuhito Saito